Datasheet

ADN8831 Data Sheet
Rev. A | Page 16 of 20
04663-018
–15 5 25 45
0
2.5
65
0.5
1.0
1.5
2.0
TEMPERATURE(°C)
V
OUT1
(V)
Figure 18. V
OUT1
vs. Temperature
PID COMPENSATION AMPLIFIER (Chop2)
Use the Chop2 amplifier as the PID compensation amplifier.
The voltage at OUT1 feeds into the PID compensation amplifier.
The frequency response of the PID compensation amplifier is
dictated by the compensation network. Apply the temperature
set voltage at IN2P. In Figure 17, the voltage at OUT2 is calcu-
lated using the following equation:
)(
TEMPSETOUT1TEMPSETOUT2
VV
Z1
Z2
VV 
The user sets the exact compensation network. This network
varies from a simple integrator to PI, PID, or any other type of
network. The user also determines the type of compensation
and component values because they are dependent on the thermal
response of the object and the TEC. One method for empirically
determining these values is to input a step function to IN2P,
therefore changing the target temperature, and adjusting the
compensation network to minimize the settling time of the TEC
temperature.
A typical compensation network for temperature control of
a laser module is a PID loop consisting of a very low frequency
pole and two separate zeros at higher frequencies. Figure 19
shows a simple network for implementing PID compensation.
To reduce the noise sensitivity of the control loop, an additional
pole is added at a higher frequency than the zeros. The bode
plot of the magnitude is shown in Figure 20. The unity-gain
crossover frequency of the feedforward amplifier is calculated
using the following equation:
TECGAIN
R3C1
f 

 80
2
1
dB0
To ensure stability, the unity-gain crossover frequency is to be
lower than the thermal time constant of the TEC and thermistor.
However, this thermal time constant is sometimes unspecified
making it difficult to characterize. There are many texts written
on loop stabilization, and it is beyond the scope of this data
sheet to discuss all methods and trade offs in optimizing
compensation networks.
ADN8831
CHOP2
–
+
IN2P IN2N
4 76
OUT1 OUT2
5
C1
CFC2
R2
R3
V
T
E
M
P
S
E
T
R1
04663-019
Figure 19. Implementing a PID Compensation Loop
04663-020
FREQUENCY (Hz Log Scale)
MAGNITUDE (Log Scale)
0dB
1
2πR3C1
R1
R3
1
2πR3C2
1
2πR1C1
1
2πC2 (R2 + R3)
R1
R2 || R3
Figure 20. Bode Plot for PID Compensation
With an ADN8831-EVALZ board, AN-695, an application note
shows how to determine the PID network components for a
stable TEC subsystem performance.