Datasheet

ADN8810
Rev. A | Page 7 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
DVSS
NC
AVSS
AVDD
VREF
NC
18
17
16
15
14
13
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
24
ADDR2
RSN
FB
ADDR1
ADDR0
FAULT
DGND DVDD RESET CS SCLK SDI
SB
PVDD
IOUT IOUT
PVDD
ENCOMP
NC = NO CONNECT
ADN8810
23 22 21 20 19
7 8 9 10 11 12
1
2
3
4
5
6
03195-0-003
Figure 3. Pin Configuration
Table 4. Pin Function Description
Pin No. Mnemonic Type Description
1 ADDR2 Digital Input Chip Address, Bit 2
2 RSN Analog Input Sense Resistor RS2 Feedback
3 FB Analog Input Sense Resistor RS1 Feedback
4 ADDR1 Digital Input Chip Address, Bit 1
5 ADDR0 Digital Input Chip Address, Bit 0
6 FAULT Digital Output Load Open/Short Indication
7
SB
Digital Input Active Deactivates Output Stage (High Output Impedance State)
8, 11 PVDD Power Power Supply for IOUT (3.3 V Recommended)
9, 10 IOUT Analog Output Current Output
12 ENCOMP Digital Input Connect to AVSS
13 NC No Connection
14 VREF Analog Input Input for High Accuracy External Reference Voltage (ADR292ER)
15 AVDD Power Power Supply for DAC
16 AVSS Ground Connect to Analog Ground or Most Negative Potential in Dual-Supply Applications
17 NC No Connection
18 DVSS Ground Connect to Digital Ground or Most Negative Potential in Dual-Supply Applications
19 SDI Digital Input Serial Data Input
20 SCLK Digital Input Serial Clock Input
21
CS
Digital Input Chip Select; Active Low
22
RESET
Digital Input Asynchronous Reset to Return DAC Output to Code Zero; Active Low
23 DVDD Power Power Supply for Digital Interface
24 DGND Ground Digital Ground