Datasheet

ADN8102
Rev. B | Page 8 of 36
Pin No. Mnemonic Type Description
28 ON_B3 I/O High Speed Output Complement
29 OP_B3 I/O High Speed Output
30 ENB Control Port B Enable
31 PE_B1 Control Port B Output Pre-Emphasis MSB
32 PE_B0 Control Port B Output Pre-Emphasis LSB
33 EQ_B0 Control Port B Input Equalization LSB
34 EQ_B1 Control Port B Input Equalization MSB
35 IN_B3 I/O High Speed Input Complement
36 IP_B3 I/O High Speed Input
37 VEE Power Negative Supply
38 IN_B2 I/O High Speed Input Complement
39 IP_B2 I/O High Speed Input
40 VTTI Power Input Termination Supply
41 IN_B1 I/O High Speed Input Complement
42 IP_B1 I/O High Speed Input
43 VCC Power Positive Supply
44 IN_B0 I/O High Speed Input Complement
45 IP_B0 I/O High Speed Input
46
LOS_B
Digital I/O Port B Loss of Signal Status, Active Low
47 SDA Control I
2
C Control Interface Data Input/Output
48 SCL Control I
2
C Control Interface Clock Input
49 ADDR0 Control I
2
C Control Interface Address LSB
50 ADDR1 Control I
2
C Control Interface Address MSB
51 ON_A3 I/O High Speed Output Complement
52 OP_A3 I/O High Speed Output
53 VEE Power Negative Supply
54 ON_A2 I/O High Speed Output Complement
55 OP_A2 I/O High Speed Output
56 VTTO Power Output Termination Supply
57 ON_A1 I/O High Speed Output Complement
58 OP_A1 I/O High Speed Output
59 VCC Power Positive Supply
60 ON_A0 I/O High Speed Output Complement
61 OP_A0 I/O High Speed Output
62 ENA Control Port A Enable
63 PE_A0 Control Port A Output Pre-Emphasis LSB
64 PE_A1 Control Port A Output Pre-Emphasis MSB
EP EPAD Power EPAD Must Be Connected to VEE