Datasheet

Data Sheet ADN4690E/ADN4692E/ADN4694E/ADN4695E
Rev. A | Page 13 of 20
RECEIVER TIMING MEASUREMENTS
A
NOTES
1. C
L
IS 20%, CERAMIC, SURFACE MOUNT, AND
INCLUDES PROBE/STRAY CAPACITANCE
< 2cm FROM DUT.
V
OUT
C
L
15pF
B
10471-028
RO
RE
V
ID
Figure 29. Receiver Timing Measurement
A
1.4V
1.0V
S1
1.2V
RE INPUT
NOTES
1. C
L
IS 20% AND INCLUDES PROBE/STRAY
CAPACITANCE < 2cm FROM DUT.
2. R
L
IS 1% METAL FILM, SURFACE MOUNT, <2cm FROM DUT.
V
OUT
C
L
15pF
R
L
499Ω
B
10471-029
RO
RE
V
TEST
Figure 30. Receiver Enable/Disable Time
NOTES
1. INPUT PULSE GENERATOR: AGILENT 8304A STIMULUS SYSTEM;
50MHz; 50% ± 1% DUTY CYCLE.
2. MEASURED USING TEK TDS6604 WITH TDSJIT3 SOFTWARE.
V
OH
V
OL
1/f0
INPUT
(V
A
– V
B
)
10471-030
0.5V
CC
0.5V
CC
0.5V
CC
0.5V
CC
1/f0
OUTPUT
(IDEAL)
V
OH
V
OL
OUTPUT
(ACTUAL)
t
c(n)
t
J(PER)
= |t
c(n)
– 1/f0|
Figure 31. Receiver Period Jitter Characteristics
NOTES
1. INPUT PULSE GENERATOR: 1MHz; 50% ± 5% DUTY CYCLE; t
R
, t
F
≤ 1ns.
2. MEASURED ON TEST EQUIPMENT WITH –3dB BANDWIDTH ≥ 1GHz.
V
CC
/2 V
CC
/2
V
OH
V
ID
V
B
V
A
V
OL
V
OUT
90%
0V 0V
10%
90%
10%
t
F
t
R
t
RPLH
t
RPHL
10471-031
Figure 32. Receiver Propagation and Rise/Fall Times
0.5V
CC
0.5V
CC
V
CC
0V
V
CC
0V
V
OL
V
OH
0.5V
CC
0.5V
CC
V
OH
– 0.5V
RE INPUT
(V
TEST
= V
CC
)
(A = 1V)
V
OUT
V
OUT
(V
TEST
= 0V)
(A = 1.4V)
10471-032
t
RPZH
t
RPZL
V
OL
+ 0.5V
t
RPHZ
t
RPLZ
NOTES
1. INPUT PULSE GENERATOR: 1MHz; 50 ± 5% DUTY CYCLE;
t
R
,
t
F
≤ 1ns.
Figure 33. Receiver Enable/Disable Times
NOTES
1. INPUT PULSE GENERATOR: AGILENT 8304A STIMULUS SYSTEM;
100Mbps; 2
15
– 1PRBS.
2. MEASURED USING TEK TDS6604 WITH TDSJIT3 SOFTWARE.
V
OH
V
OL
V
A
V
B
OUTPUT
INPUT
(PRBS)
t
J(PP)
V
CC
/2V
CC
/2
10471-033
Figure 34. Receiver Peak-to-Peak Jitter Characteristics