Datasheet
Data Sheet ADN4670
Rev. A | Page 7 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1Q3
2
Q3
3
Q4
4
Q4
5
Q5
6
Q5
7
Q6
8Q6
24
23
22
21
20
19
18
17
CK
SI
CLK0
CLK0
V
BB
CLK1
CLK1
NOTES
1. THE EXPOSED PAD CAN BE CONNECTED
TO GROUND OR LEFT FLOATING.
EN
9
10
11
12
13
14
15
16
V
SS
Q9
Q9
Q8
Q8
Q7
Q7
V
DD
32
31
30
29
28
27
26
25
V
DD
Q0
Q0
Q1
Q1
Q2
Q2
V
SS
TOP VIEW
(Not to Scale)
ADN4670
08870-004
Figure 4. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 CK
Programming Clock. Programming data is clocked in on a low-to-high transition at this input. If left
open-circuit, it is pulled high by a 120 kΩ resistor.
2 SI
Serial Data Input. This is the input for programming data. If left open-circuit, it is pulled low by a 120 kΩ
resistor.
3 CLK0 Noninverting Differential Clock Input 0.
4
CLK0
Inverting Differential Clock Input 0.
5 V
BB
Reference Voltage Output.
6 CLK1 Noninverting Differential Clock Input 1.
7
CLK1
Inverting Differential Clock Input 1.
8 EN
Active-High Enable Input. When this input is high, programming is enabled. If left open-circuit, it is
pulled low by a 120 kΩ resistor.
9, 25 V
SS
Device Ground.
10, 12, 14, 17, 19,
21, 23, 26, 28, 30
Q9 to Q0 Inverted Clock Output. When the differential input voltage is between CLKx and CLKx > 100 mV, this
output sinks current. When the differential input voltage is between CLKx and CLKx
< −100 mV, this
output sources current.
11, 13, 15, 18, 20,
22, 24, 27, 29, 31
Q9 to Q0
Noninverted Clock Output. When the differential input voltage is between CLKx and CLKx
> 100 mV,
this output sources current. When the differential input voltage is between CLKx and CLKx
< −100 mV,
this output sinks current.
16, 32 V
DD
Power Supply Input. This part can be operated from 2.375 V to 2.625 V.