Datasheet
ADN4666
Rev. 0 | Page 4 of 12
TIMING SPECIFICATIONS
V
CC
= 3.0 V to 3.6 V, C
L
= 15 pF to GND, all specifications T
MIN
to T
MAX
, unless otherwise noted.
1
Table 2.
Parameter
2
Symbol Min Typ
3
Max Unit Test Conditions/Comments
4, 5
AC CHARACTERISTICS
Differential Propagation Delay, High to Low t
PHLD
1.8 3.3 ns C
L
= 15 pF, V
ID
= 300 mV (see Figure 2 and Figure 3)
Differential Propagation Delay, Low to High t
PLHD
1.8 3.3 ns C
L
= 15 pF, V
ID
= 300 mV (see Figure 2 and Figure 3)
Differential Pulse Skew
6
|t
PHLD
− t
PLHD
| t
SKD1
0 0.1 0.35 ns C
L
= 15 pF, V
ID
= 300 mV (see Figure 2 and Figure 3)
Differential Channel-to-Channel Skew
(Same Device)
7
t
SKD2
0 0.1 0.5 ns C
L
= 15 pF, V
ID
= 300 mV (see Figure 2 and Figure 3)
Differential Part-to-Part Skew
8
t
SKD3
1.0 ns C
L
= 15 pF, V
ID
= 300 mV (see Figure 2 and Figure 3)
Differential Part-to-Part Skew
9
t
SKD4
1.5 ns C
L
= 15 pF, V
ID
= 300 mV (see Figure 2 and Figure 3)
Rise Time t
TLH
0.35 1.2 ns C
L
= 15 pF, V
ID
= 300 mV (see Figure 2 and Figure 3)
Fall Time t
THL
0.35 1.2 ns C
L
= 15 pF, V
ID
= 300 mV (see Figure 2 and Figure 3)
Disable Time, High to Z t
PHZ
8 12 ns R
L
= 2 kΩ, C
L
= 15 pF (see Figure 4 and Figure 5)
Disable Time, Low to Z t
PLZ
8 12 ns R
L
= 2 kΩ, C
L
= 15 pF (see Figure 4 and Figure 5)
Enable Time, Z to High t
PZH
11 17 ns R
L
= 2 kΩ, C
L
= 15 pF (see Figure 4 and Figure 5)
Enable Time, Z to Low t
PZL
11 17 ns R
L
= 2 kΩ, C
L
= 15 pF (see Figure 4 and Figure 5)
Maximum Operating Frequency
10
f
MAX
200 250 MHz All channels switching
SIGNAL
GENERATOR
RECEIVER
IS ENABLED
1
Generator waveform for all tests, unless otherwise specified: f = 1 MHz, Z
O
= 50 Ω, t
TLH
and t
THL
(0% to 100%) ≤ 3 ns for R
INx+
/R
INx−
.
2
AC parameters are guaranteed by design and characterization.
3
All typical values are given for V
CC
= 3.3 V and T
A
= 25°C.
4
Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground, unless otherwise specified.
5
C
L
includes load and jig capacitance.
6
t
SKD1
is the magnitude difference in the differential propagation delay time between the positive-going edge and the negative-going edge of the same channel.
7
Channel-to-channel skew, t
SKD2
, is defined as the difference between the propagation delay of one channel and that of the others on the same chip with any event on
the inputs.
8
t
SKD3
part-to-part skew is the differential channel-to-channel skew of any event between devices. The t
SKD3
specification applies to devices at the same V
CC
and within
5°C of each other within the operating temperature range.
9
t
SKD4
part-to-part skew is the differential channel-to-channel skew of any event between devices. The t
SKD4
specification applies to devices over the recommended
operating temperature and voltage ranges and across process distribution. t
SKD4
is defined as |maximum − minimum| differential propagation delay.
10
f
MAX
generator input conditions: f = 200 MHz, t
TLH
= t
THL
< 1 ns (0% to 100%), 50% duty cycle, differential (1.05 V to 1.35 V p-p). f
MAX
generator output criteria: 60%/40%
duty cycle, V
OL
(maximum = 0.4 V), V
OH
(minimum = 2.7 V), and load = 15 pF (stray plus probes).
Test Circuits and Timing Diagrams
V
R
INx+
R
INx–
C
L
NOTES
1. C
L
= LOAD AND TEST JIG CAPACITANCE.
CC
R
OUTx
50Ω 50Ω
08097-002
Figure 2. Test Circuit for Receiver Propagation Delay and Transition Time