Datasheet

ManualsBrandsANALOG DEVICES ManualsPMICsPMIC - laser controller Laser diode driver LFCSP 24 VQ Surface-mount

3.3 V, 50 Mbps to 4.25 Gbps,

Single-Loop, Laser Diode Driver

ADN2873

Rev. 0

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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

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FEATURES

SFP/SFF and SFF-8472 MSA compliant

SFP reference design available

50 Mbps to 4.25 Gbps operation

Automatic average power control

Typical 60 ps output rise/fall time

VCSEL, DFB, and FP laser support

Bias current range: from 2 mA to 100 mA

Modulation current range: from 5 mA to 90 mA

Laser fail alarm and automatic laser shutdown (ALS)

Bias and modulation current monitoring

Voltage setpoint control

Resistor setpoint control

3.3 V supply

24-lead 4 mm × 4 mm LFCSP

Pin compatible with ADN2870

APPLICATIONS

1×/2×/4× Fibre Channel SFP/SFF modules

Multirate OC3 to OC48-FEC SFP/SFF modules

LX-4 modules

DWDM/CWDM laser transmitters

HDTV (SMPTE family) laser transmitters

GENERAL DESCRIPTION

Like the ADN2870, the ADN2873 laser diode driver (LDD) is

designed for advanced SFP and SFF modules, using SFF-8472

digital diagnostics. The ADN2873 supports NRZ data

transmission operation from 50 Mbps up to 4.25 Gbps. With a

new alarm scheme, this device avoids the shutdown issue

caused by the system transient generated from various lasers.

The ADN2873 monitors the laser bias and modulation currents

and it provides fail alarms and ALS. Using setup voltages of a

microcontroller DAC or a trimmable resistor voltage divider,

the ADN2873 can set up a laser optical average output power and

extinction ratio. The optical average power control loop consists

of an optical feedback from a photodiode, the comparator, and a

status holder. The ADN2873 works easily with the Analog

Devices, Inc., ADuC7019/ADuC702x family of MicroConverter®

devices and with the ADN289x family of limiting amplifiers to

make a complete SFP/SFF transceiver chipset solution.

The ADN2873 is pin compatible with the ADN2870 dual-loop

LDD, allowing the same design to work with either device. For

dual-loop control applications, refer to the ADN2870 data sheet.

The product is available in a space-saving 24-lead, 4 mm × 4 mm

LFCSP specified over the −40°C to +85°C temperature range.

Figure 1 shows an application diagram of the voltage setpoint

control with single-ended laser interface. Figure 36 shows a

differential laser interface.

APPLICATIONS DIAGRAM

ANALOG DEVICES

MICROCONTROLLER

x_DISABL

Tx_FAULT

CONTROL

PAVREF

PAVSET

ADN2873

RPAV

GND

DAC

MPD

ERREF

ERSET

GND

IMOD

DATAP

IMODP

DATAN

IMODN

IBMON IMMON

ALSFAIL

IBIAS

100Ω

CCBIAS

LASER

VCC

GND GND

PAVCAP

470Ω1kΩ

GND

1kΩ

ADC

×100

07493-001

Figure 1.

Summary of content (20 pages)

PAGE 1
3.3 V, 50 Mbps to 4.25 Gbps, Single-Loop, Laser Diode Driver ADN2873 FEATURES GENERAL DESCRIPTION SFP/SFF and SFF-8472 MSA compliant SFP reference design available 50 Mbps to 4.
PAGE 2
ADN2873 TABLE OF CONTENTS Features .............................................................................................. 1 Laser Control .............................................................................. 13 Applications ....................................................................................... 1 Control Methods ........................................................................ 13 General Description .................................................................
PAGE 3
ADN2873 SPECIFICATIONS VCC = 3.0 V to 3.6 V. All specifications TMIN to TMAX1, unless otherwise noted. Typical values are specified at 25°C. Table 1.
PAGE 4
ADN2873 Parameter IBMON, IMMON DIVISION RATIO IBIAS/IBMON3 IBIAS/IBMON3 IBIAS/IBMON3 IBIAS/IBMON STABILITY3, 10 IMOD/IMMON IBMON Compliance Voltage SUPPLY ICC11 VCC (with Respect to GND)12 Min Typ Max Unit Conditions/Comments 76 85 92 98 98 100 112 115 108 ±5 2 mA < IBIAS < 11 mA 11 mA < IBIAS < 50 mA 50 mA < IBIAS < 100 mA 10 mA < IBIAS < 100 mA 1.3 A/A A/A A/A % A/A V mA V When IBIAS = IMOD = 0 mA 3.6 42 0 31 3.3 3.0 1 Temperature range is from −40°C to +85°C.
PAGE 5
ADN2873 SFP TIMING SPECIFICATIONS Table 2. Parameter ALS Assert Time Symbol t_off ALS Negate Time1 Time to Initialize, Including Reset of FAIL1 FAIL Assert Time ALS to Reset Time Typ 1 Max 5 Unit μs t_on 0.15 0.
PAGE 6
ADN2873 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter VCC to GND IMODN, IMODP All Other Pins Junction Temperature Operating Temperature Range, Industrial Storage Temperature Range Junction Temperature (TJ max) Power Dissipation1 θJA Thermal Impedance2 θJC Thermal Impedance Lead Temperature (Soldering, 10 sec) Rating 4.2 V −0.3 V to +4.8 V −0.3 to +3.9 V 150°C −40°C to +85°C –65°C to +150°C 125°C (TJ max − TA)/θJA W 30°C/W 29.
PAGE 7
ADN2873 24 23 22 21 20 19 IBIAS GND IMODN IMODP VCC GND PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 3 4 5 6 PIN 1 INDICATOR ADN2873 TOP VIEW (Not to Scale) 18 17 16 15 14 13 FAIL IBMON VCC ERREF IMMON ERSET NOTES 1. NC = NO CONNECT. 2. THE LFCSP HAS AN EXPOSED PADDLE THAT MUST BE CONNECTED TO GND. 07493-006 NC PAVCAP GND DATAP DATAN ALS 7 8 9 10 11 12 CCBIAS PAVSET GND VCC PAVREF RPAV Figure 6. Pin Configuration Table 4. Pin Function Descriptions Pin No.
PAGE 8
ADN2873 TYPICAL PERFORMANCE CHARACTERISTICS SINGLE-ENDED OUTPUT These performance characteristics were measured using the high speed electrical single-ended output circuit shown in Figure 2. 1.2 90 RANDOM JITTER (rms) 1.0 RISE TIME (ps) 60 30 0.8 0.6 0.4 0 20 40 60 80 100 MODULATION CURRENT (mA) 0 07493-012 0 0 20 40 60 80 100 MODULATION CURRENT (mA) Figure 7. Rise Time vs. Modulation Current, IIBIAS = 20 mA 07493-014 0.2 Figure 9. Random Jitter vs.
PAGE 9
ADN2873 DIFFERENTIAL OUTPUT These performance characteristics were measured using the high speed electrical differential output circuit shown in Figure 3. 90 1.2 RANDOM JITTER (rms) RISE TIME (ps) 1.0 60 30 0.8 0.6 0.4 0 20 40 60 80 100 MODULATION CURRENT (mA) 0 07493-016 0 0 20 40 60 80 100 MODULATION CURRENT (mA) 07493-018 0.2 Figure 13. Random Jitter vs. Modulation Current, IIBIAS = 20 mA Figure 11. Rise Time vs.
PAGE 10
ADN2873 240 40 220 38 100 36 IIBIAS = 90mA SUPPLY CURRENT (I CC) 180 160 IIBIAS = 40mA 140 120 IIBIAS = 20mA 100 IIBIAS = 10mA 80 32 30 28 26 24 22 60 0 10 20 40 60 80 100 MODULATION CURRENT (mA) 20 07493-020 40 34 Figure 15. Total Supply Current vs. Modulation Current Total Supply Current = IVCC + IIBIAS + IIMOD –40 25 07493-023 TOTAL SUPPLY CURRENT (mA) PERFORMANCE CHARACTERISTICS 85 TEMPERATURE (°C) Figure 18. Supply Current (ICC) vs.
PAGE 11
ADN2873 TRANSMISSION ON FAIL ASSERTED FAULT FORCED ON PAVSET 07493-027 07493-026 POWER SUPPLY TURNED ON Figure 22. Time to Initialize, Including Reset, 40 ms/DIV Figure 21. FAIL Assert Time,1 μs/DIV Rev.
PAGE 12
ADN2873 OPTICAL WAVEFORMS VCC = 3.3 V and TA = 25°C, unless otherwise noted. Note that there was no change to PAVCAP and ERCAP values when different data rates were tested. Figure 23, Figure 24, and Figure 25 show multirate performance using the low cost Fabry Perot TOSA NEC NX7315UA; Figure 26 and Figure 27 show performance over temperature using the DFB TOSA Sumitomo SLT2486. 07493-010 (ACQ LIMIT TEST) WAVEFORMS 1001 07493-007 (ACQ LIMIT TEST) WAVEFORMS 1000 Figure 23. Optical Eye 2.
PAGE 13
ADN2873 THEORY OF OPERATION Laser diodes have a current-in to light-out transfer function, as shown in Figure 28. Two key characteristics of this transfer function are the threshold current, ITH, and the laser slope in the linear region beyond the threshold current, referred to as the slope efficiency, LI. P1 PO P1 + PO PAV = 2 P1 ΔP PAV ΔI LI = PO ITH The ADN2873 has two methods for setting the average power (PAV) and ER.
PAGE 14
ADN2873 VCC VCC VCC Tx_DISABLE VCC L Tx_FAULT VCC FAIL ALS IMODN LASER R MPD IMODP DATAP ANALOG DEVICES MICROCONTROLLER PAVSET PAVREF DAC DATAN 100Ω CONTROL VCC IBIAS RPAV ADC ×100 1kΩ CCBIAS IMOD GND ERREF DAC RZ ERSET ADN2873 1kΩ GND IBMON IMMON VCC GND PAVCAP NC GND 470Ω 07493-029 1kΩ GND GND Figure 29.
PAGE 15
ADN2873 RESISTOR SETPOINT CALIBRATION Method 2: Measuring IMPD Across a Sense Resistor In resistor setpoint calibration, the PAVREF, ERREF, and RPAV pins must all be tied to VCC. The average power and extinction ratio can be set using the PAVSET and ERSET pins, respectively. A resistor is placed between the pin and GND to set the current flowing in each pin, as shown in Figure 30. The ADN2873 ensures that both PAVSET and ERSET are kept 1.23 V above GND.
PAGE 16
ADN2873 VCC Power consumption can be calculated as PHOTODIODE ICC = ICC min + 0.3 IMOD P = VCC × ICC + (IBIAS × VBIAS_PIN) + IMOD (VMODP_PIN + VMODN_PIN)/2 PAVSET ADN2873 R TDIE = TAMBIENT + θJA × P 07493-034 MICROCONVERTER ADC INPUT Figure 34.
PAGE 17
ADN2873 transmission line values can be used, with some modification of the component values. In Figure 35, the R and C snubber values 24 Ω and 2.2 pF, respectively, represent a starting point and must be tuned for the particular model of laser being used. RP, the pull-up resistor, is in series with a very small (0.5 nH) inductor. In some cases, an inductor is not required or can be accommodated with deliberate parasitic inductance, such as a thin trace or a via placed on the PC board.
PAGE 18
ADN2873 The ADN2873 has a latched, active high monitoring alarm (FAIL). The FAIL alarm output is open drain in conformance with SFP MSA specification requirements.
PAGE 19
ADN2873 OUTLINE DIMENSIONS 0.60 MAX 4.00 BSC SQ PIN 1 INDICATOR 0.60 MAX TOP VIEW 0.50 BSC 3.75 BSC SQ 0.50 0.40 0.30 1.00 0.85 0.80 12° MAX SEATING PLANE 0.80 MAX 0.65 TYP 0.30 0.23 0.18 PIN 1 INDICATOR 19 18 24 1 *2.45 2.30 SQ 2.15 EXPOSED PAD (BOTTOMVIEW) 13 12 7 6 0.23 MIN 2.50 REF 0.05 MAX 0.02 NOM 0.20 REF COPLANARITY 0.08 *COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-2 EXCEPT FOR EXPOSED PAD DIMENSION Figure 38.