Datasheet

Data Sheet ADN2817/ADN2818
Rev. E | Page 17 of 40
Table 15. Mode Select Register, SEL_MODE
CLK Holdover Mode
D7 D6 D5 D4 D3 D2 D1 D0
Set to 0 Set to 0 Set to 0 Set to 0
Default 0
Limited rate enable = 1
Set to 0 Set to 1 for clock holdover mode Set to 0
Table 16. BER Control Register, BERCTLA
BER Timer (NUMBITS) BER Start Pulse
Error Count Byte Select
(NUMERRORS[39:0])
D7
D6
D5
No. of Bits
D4
D3
D2
D1
D0
Byte Selection
0 0 0 2
18
bits Set to 0 Write a 1 followed by a 0 to initiate BER measurement 0 0 0 Byte 0
0
0
1
2
21
bits
0
0
1
Byte 1
0 1 0 2
24
bits 0 1 0 Byte 2
0 1 1 2
27
bits 0 1 1 Byte 3
1 0 0 2
30
bits 1 0 0 Byte 4
1 0 1 2
33
bits
1 1 0 2
36
bits
1
1
1
2
39
bits