Datasheet

Data Sheet ADN2812
Rev. E | Page 23 of 28
04228-027
50Ω
50Ω
PIN
VREF
NIN
C
IN
C
OUT
C
OUT
V1
C
IN
V1b
V2
V2b
TIA
LIMAMP
CDR
+
–
VCC
DATAOUTP
DATAOUTN
1
V1
V1b
V2
V2b
V
DIFF
2 3 4
VREF
VTH
ADN2812
V
DIFF
= V2–V2b
VTH = ADN2812 QUANTIZER THRESHOLD
NOTES:
1. DURING DATA PATTERNS WITH HIGH TRANSITION DENSITY, DIFFERENTIAL DC VOLTAGE AT V1 AND V2 IS ZERO.
2. WHEN THE OUTPUT OF THE TIA GOES TO CID, V1 AND V1b ARE DRIVEN TO DIFFERENT DC LEVELS. V2AND V2b DISCHARGE TO THE
VREF LEVEL, WHICH EFFECTIVELY INTRODUCES A DIFFERENTIAL DC OFFSETACROSS THE AC COUPLING CAPACITORS.
3. WHEN THE BURST OF DATA STARTS AGAIN, THE DIFFERENTIAL DC OFFSETACROSS THE AC COUPLING CAPACITORS IS APPLIED TO
THE INPUT LEVELS CAUSING A DC SHIFT IN THE DIFFERENTIAL INPUT. THIS SHIFT IS LARGE ENOUGH SUCH THAT ONE OF THE STATES,
EITHER HIGH OR LOW DEPENDING ON THE LEVELS OF V1AND V1b WHEN THE TIA WENT TO CID, IS CANCELED OUT. THE QUANTIZER
DOES NOT RECOGNIZE THISAS A VALID STATE.
4. THE DC OFFSET SLOWLY DISCHARGES UNTIL THE DIFFERENTIAL INPUT VOLTAGE EXCEEDS THE SENSITIVITY OF THEADN2812. THE
QUANTIZER CAN RECOGNIZE BOTH HIGH AND LOW STATES AT THIS POINT.
Figure 27. Example of Baseline Wander
DC-COUPLED APPLICATION
The inputs to the ADN2812 can be dc-coupled. This might be
necessary in burst mode applications, where there are long periods
of CIDs, and baseline wander cannot be tolerated. If the inputs
to the ADN2812 are dc-coupled, care must be taken not to
violate the input range and common-mode level requirements
of the ADN2812 (see Figure 28 through Figure 30). If dc coupling
is required, and the output levels of the TIA do not adhere to
the levels shown in Figure 29, level shifting and/or an attenuator
must be between the TIA outputs and the ADN2812 inputs.
04228-028
50Ω
0.1µF
50Ω
3kΩ
NIN
PIN
ADN2812
2.5V
VREF
50Ω
50Ω
TIA
VCC
Figure 28. DC-Coupled Application
04228-029
PIN
INPUT (V)
V
PP
= PIN – NIN = 2 × V
SE
= 10mV AT SENSITIVITY
V
SE
= 5mV MIN
V
CM
= 2.3V MIN
(DC-COUPLED)
NIN
Figure 29. Minimum Allowed DC-Coupled Input Levels
04228-030
PIN
INPUT (V)
V
PP
= PIN – NIN = 2 × V
SE
= 2.0V MAX
V
SE
= 1.0V MAX
V
CM
= 2.3V
(DC-COUPLED)
NIN
Figure 30. Maximum Allowed DC-Coupled Input Levels