Datasheet
ADN2805 Data Sheet
Rev. B | Page 14 of 16
APPLICATIONS INFORMATION
PCB DESIGN GUIDELINES
Proper RF PCB design techniques must be used for optimal
performance.
Power Supply Connections and Ground Planes
Use of one low impedance ground plane is recommended. To
reduce series inductance, solder the VEE pins directly to the
ground plane. If the ground plane is an internal plane and
connections to the ground plane are made through vias, multiple
vias can be used in parallel to reduce the series inductance,
especially on Pin 23, which is the ground return for the output
buffers. Connect the exposed pad to the ground plane using
plugged vias to prevent solder from leaking through the vias
during reflow.
Use of a 22 μF electrolytic capacitor between VCC and VEE is
recommended at the location where the 3.3 V supply enters the
PCB. When using 0.1 μF and 1 nF ceramic chip capacitors,
place them between the IC power supply VCC and VEE, as
close as possible to the ADN2805 VCC pins.
If connections to the supply and ground are made through vias,
the use of multiple vias in parallel helps to reduce series
inductance, especially on Pin 24, which supplies power to the
high speed CLKOUTP/CLKOUTN and DATAOUTP/
DATAOUTN output buffers. Refer to Figure 14 for the
recommended connections.
By using adjacent power supply and ground planes, excellent
high frequency decoupling can be realized by using close
spacing between the planes. This capacitance is given by
(
)
pFε88.0 A/dC
r
PLANE
=
where:
ε
r
is the dielectric constant of the PCB material.
A is the area of the overlap of power and ground planes (cm
2
).
d is the separation between planes (mm).
For FR-4, ε
r
= 4.4 mm and 0.25 mm spacing, C ~15 pF/cm
2
.
50Ω TRANSMISSION LINES
DATAOUTP
DATAOUTN
CLKOUTP
CLKOUTN
0.1µF22µF 1nF
0.1µF
0.1µF
0.1µF
0.1µF
0.47µF ±20%
>300MΩ INSULATION RESISTANCE
1nF
1nF
1nF
0.1µF1nF
+
VCC
50Ω
50Ω
OPTICAL
TRANSCEIVER
MODULE
VCC
NC
NC
µC
I
2
C CONTROLLER
I
2
C CONTROLLER
VCC
VCC
07121-014
1
VCC
2
VCC
3
VREF
4
NIN
5
PIN
6
NC
7
NC
8
VEE
24
VCC
23
VEE
22
NC
21
SDA
20
SCK
19
SADDR5
18
VCC
17
VEE
9
10
R
EFCLKP
11
REFCLKN
12
VCC
13
VEE
14
CF2
15
C
F1
16
LOL
32
VCC
31
VCC
30
VEE
29
DATAOUTP
28
DATA
OUTN
27
SQUELCH
26
CLKOUTP
25
CLKOUTN
EXPOSED PAD
TIED OFF TO
VEE PLANE
WITH VIAS
Figure 14. Typical Applications Circuit