Datasheet

REV. B
ADMC401
–8–
Parameter Min Max Unit
Memory Read
Timing Requirements:
t
RDD
RD Low to Data Valid 0.5t
CK
– 11 + w ns
t
AA
A0–A13, PMS, DMS, BMS to Data Valid 0.75t
CK
– 12 + w ns
t
RDH
Data Hold from RD High 0 ns
Switching Characteristics:
t
RP
RD Pulsewidth 0.5t
CK
– 5 + w ns
t
CRD
CLKOUT High to RD Low 0.25t
CK
– 5 0.25t
CK
+ 7 ns
t
ASR
A0–A13, PMS, DMS, BMS Setup before RD Low 0.25t
CK
– 6 ns
t
RDA
A0–A13, PMS, DMS, BMS Hold after RD Deasserted 0.25t
CK
– 3 ns
t
RWR
RD High to RD or WR Low 0.5t
CK
– 5 ns
w = wait states × t
CK
.
CLKOUT
A0–A13
D
RD
WR
DMS, PMS
BMS
t
RWR
t
RP
t
ASR
t
CRD
t
AA
t
RDA
t
RDD
t
RDH
Figure 4. Memory Read