Datasheet

REV. B

ADMC401

–50–

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

0 = NO OVERFLOW

1 = OVERFLOW

EETSTAT(R)

DM (0x2074)

EET

OVERFLOW

000000

DM (0x2028)

EIUFILTER (R/W)

DM (0x2070)

EETN (R/W)

DM (0x2029)

EIZLATCH (R)

EISLATCH (R)

000000000000000

EETDIV (R/W)

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

ENCODER FILTER CLOCK

DIVIDE VALUE

DM (0x202A)

0000000000000000

00000000

DM (0x2071)

0000000000

00000000

EETDELTAT (R)

EETT (R)

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

DM (0x2072)

DM (0x2073)

Figure 38. Structure of Registers of ADMC401

Default bit values are shown; if no value is shown, the bit field is undefined at reset. Reserved bits are shown on a gray field—these

bits should always be written as shown.