Datasheet

RECOMMENDED OPERATING CONDITIONS
B Grade
Parameter Min Max Unit
V
DD
Digital Supply Voltage 4.75 5.25 V
AV
DD
Analog Supply Voltage 4.75 5.25 V
T
AMB
Ambient Operating Temperature –40 +85 °C
ELECTRICAL CHARACTERISTICS
Parameter Test Conditions Min Max Unit
V
IH
HI-Level Input Voltage
1, 2, 3
@ V
DD
= max 2.0 V
V
IL
LO-Level Input Voltage
1, 2, 3
@ V
DD
= min 0.8 V
V
OH
HI-Level Output Voltage
1, 3, 4, 5, 6
@ V
DD
= min, I
OH
= –1.0 mA 2.4 V
@ V
DD
= min, I
OH
= –0.1 mA V
DD
– 0.3 V
V
OL
LO-Level Output Voltage
1, 3, 4, 5, 6
@ V
DD
= min, I
OL
= 2.0 mA 0.4 V
V
OH
HI-Level Output Voltage
5
@ V
DD
= min, I
OH
= –10.0 mA 2.4 V
V
OL
LO-Level Output Voltage
5
@ V
DD
= min, I
OL
= 10.0 mA 1.2 V
I
IH
HI-Level Input Current
7
@ V
DD
= max, V
IN
= V
DD
max 10 µA
I
IH
HI-Level Input Current
8
@ V
DD
= max, V
IN
= V
DD
max 100 µA
I
IH
HI-Level Input Current
9
@ V
DD
= max, V
IN
= V
DD
max 10 µA
I
IL
LO-Level Input Current
7
@ V
DD
= max, V
IN
= 0 V 10 µA
I
IL
LO-Level Input Current
8
@ V
DD
= max, V
IN
= 0 V 10 µA
I
IL
LO-Level Input Current
9
@ V
DD
= max, V
IN
= 0 V 100 µA
I
OZH
HI-Level Three-State Leakage Current
10
@ V
DD
= max, V
IN
= V
DD
max 10 µA
I
OZL
LO-Level Three-State Leakage Current
10
@ V
DD
= max, V
IN
= 0 V 10 µA
I
DD
Digital Supply Current (Idle)
11
@ V
DD
= max 40 mA
I
DD
Digital Supply Current (Dynamic)
12
@ V
DD
= max 110 mA
I
DD
Analog Supply Current @ AV
DD
= max 60 mA
C
I
Input Pin Capacitance
13
V
IN
= 2.5 V, f
IN
= 1 MHz, 8 pF
T
AMB
= +25°C
C
O
Output Pin Capacitance
13, 14
V
IN
= 2.5 V, f
IN
= 1 MHz, 8 pF
T
AMB
= +25°C
NOTES
1
Bidirectional pins: D0–D23, RFS0, RFS1, TFS0, TFS1, SCLK0 and SCLK1, PIO0–PIO11.
2
Input only pins: PWMTRIP, PWMPOL, PWMSR, RESET, EIA, EIB, EIZ, EIS, ETU0, ETU1, DR1A, DR1B, DR0, CLKIN, CONVST, MMAP, BMODE, BR
and PWD.
3
Programmable I/O Pins (PIO0–PIO11).
4
Output pins: PWMSYNC, AUX0, AUX1, CLKOUT, DT0, DT1, BG, BGH, PMS, DMS, BMS, RD, WR, PWDACK and A0–A13.
5
Output pins: AH, AL, BH, BL, CH and CL.
6
Although specified for TTL outputs, all ADMC401 outputs are CMOS-compatible and will drive to V
DD
–0.3 V and GND+0.3 V assuming no dc loads.
7
Input only pins RESET, EIA, EIB, EIZ, EIS, ETU0, ETU1, DR1A, DR1B, DR0, CLKIN, CONVST, MMAP, BMODE, BR and PWD.
8
Input pins with internal pull-down PIO0–PIO11 and PWMTRIP.
9
Input pins with internal pull-up, PWMPOL and PWMSR.
10
Three-statable pins: A0–A13, D0–D23, PMS, DMS, BMS, RD, WR, DT0, DT1, RFS0, RFS1, TFS0, TFS1, SCLK0, SCLK1.
11
Idle refers execution of the IDLE instruction. Deasserted pins are driven to V
DD
or GND. Current reflects device operation with CLKOUT disabled.
12
Current reflects device operating with no output loads.
13
Guaranteed but not tested.
14
Output Pin Capacitance is the capacitive load for any three-state output pin.
Specifications subject to change without notice.
(V
DD
= AV
DD
= 5 V  5%, GND = AGND = 0 V, T
AMB
= –40C to +85C,
CLKIN = 13 MHz, unless otherwise noted)
REV. B
–2–
ADMC401–SPECIFICATIONS