Datasheet

ADM696/ADM697–SPECIFICATIONS
P arameter Min Typ Max Units Test Conditions/Comments
V
CC
Operating Voltage Range 3.0 5.5 V
V
BATT
Operating Voltage Range 2.0 V
CC
– 0 3 V
BATTERY BACKUP SWITCHING (ADM696)
V
OUT
Output Voltage V
CC
– 0.05 V
CC
– 0.025 V I
OUT
= 1 mA
V
CC
– 0.5 V
CC
– 0.25 V I
OUT
≤ 100 mA
V
OUT
in Battery Backup Mode V
BATT
– 0.05 V
BATT
– 0.02 V I
OUT
= 250 µA, V
CC
< V
BATT
– 0.2 V
Supply Current (Excludes I
OUT
) 1 1.95 mA I
OUT
= 100 mA
Supply Current in Battery Backup Mode 0.6 1 µAV
CC
= 0 V, V
BATT
= 2.8 V
Battery Standby Current 5.5 V > V
CC
> V
BATT
+ 0.2 V
(+ = Discharge, – = Charge) –0.1 +0.02 µAT
A
= +25°C
–1 +0.02 µA
Battery Switchover Threshold 70 mV Power-Up
V
CC
– V
BATT
50 mV Power-Down
Battery Switchover Hysteresis 20 mV
BATT ON Output Voltage 0.4 V I
SINK
= 1.6 mA
BATT ON Output Short Circuit Current 7 mA BATT ON = V
OUT
= 2.4 V Sink Current
0.5 1 25 µA BATT ON = V
OUT
, V
CC
= 0 V, Source Current
RESET AND WATCHDOG TIMER
Low Line Threshold (LL
IN
) 1.25 1.3 1.35 V V
CC
= +5 V, +3 V
Reset Timeout Delay 35 50 70 ms OSC SEL = HIGH, V
CC
= 5 V, T
A
= +25°C
Watchdog Timeout Period, Internal Oscillator 1.0 1.6 2.25 s Long Period, V
CC
= 5 V, T
A
= +25°C
70 100 140 ms Short Period, V
CC
= 5 V, T
A
= +25°C
Watchdog Timeout Period, External Clock 4032 4097 Cycles Long Period
960 1025 Cycles Short Period
Minimum WDI Input Pulse Width 50 ns V
IL
= 0.4, V
IH
= 3.5 V, V
CC
= 5 V
RESET Output Voltage @ V
CC
= +1 V 4 200 mV I
SINK
= 10 µA, V
CC
= 1 V
RESET, RESET Output Voltage 0.4 V I
SINK
= 400 µA, V
CC
= 2 V, V
BATT
= 0 V
0.4 V I
SINK
= 1.6 mA, 3 V < V
CC
< 5.5 V
3.5 V I
SOURCE
= 1 µA, V
CC
= 5 V
LOW LINE, WDO Output Voltage 0.4 V I
SINK
= 1.6 mA,
3.5 V I
SOURCE
= 1 µA, V
CC
= 5 V
Output Short Circuit Source Current 1 3 25 µA
WDI Input Threshold V
CC
= 5 V
1
Logic Low 0.8 V
Logic High 3.5 V
WDI Input Current 20 50 µA WD1 = V
OUT
, (V
CC
) T
A
= +25°C
–50 –15 µA WD1 = 0 V, T
A
= +25°C
POWER FAIL DETECTOR
PFI Input Threshold 1.2 1.3 1.4 V V
CC
= +3 V, +5 V
PFI–LL
IN
Threshold Difference –50 ±15 +50 mV V
CC
= +3 V, +5 V
PFI Input Current –25 ±0.01 +25 nA
LL
IN
Input Current –50 ±0.01 +50 nA
PFO Output Voltage 0.4 V I
SINK
= 1.6 mA
3.5 V I
SOURCE
= 1 µA, V
CC
= 5 V
PFO Short Circuit Source Current 1 3 25 µA PFI = Low, PFO = 0 V
CHIP ENABLE GATING (ADM697)
CE
IN
Threshold 0.8 V V
IL
3.0 V V
IH
, V
CC
= 5 V
CE
IN
Pullup Current 3 µA
CE
OUT
Output Voltage 0.4 V I
SINK
= 1.6 mA
V
CC
– 0.5 V I
SOURCE
= 800 µA
CE Propagation Delay 5 25 ns
OSCILLATOR
OSC IN Input Current ±2 µA
OSC SEL Input Pullup Current 5 µA
OSC IN Frequency Range 0 250 kHz OSC SEL = 0 V
OSC IN Frequency with Ext. Capacitor 4 kHz OSC SEL = 0 V, C
OSC
= 47 pF
NOTE
1
WDI is a three-level input which is internally biased to 38% of V
CC
and has an input impedance of approximately 125 kΩ.
Specifications subject to change without notice.
REV. 0–2–
(V
CC
= Full Operating Range, V
BATT
= +2.8 V, T
A
= T
MIN
to T
MAX
unless otherwise noted.)