Datasheet

Data Sheet ADM3252E
Rev. A | Page 7 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 2. Pin Configuration
Table 6. Pin Function Descriptions
Pin No. Mnemonic Description
A1, L1 NC No Connect. These pins are left unconnected.
A2, B1, B2 V
CC
Power Supply Input. A 10 μF and a 0.1 μF decoupling capacitor are required between V
CC
and ground.
The device requires a voltage between 3.0 V and 5.5 V.
A10, B10, C10 V
ISO
Supply Voltage for Isolator Secondary Side. A 10 μF and a 0.1 μF decoupling capacitor are required
between V
ISO
and ground.
A11, L11 DNC Do Not Connect. Do not connect or route anything through these pins.
B11 V+ Internally Generated Positive Supply.
C1, C2, D2, E1, E2,
F2, G1, G2, H2, J1,
J2, K2, L2
GND Ground Reference for Logic Side.
C11, E11, G10, G11
C1+, C1−,
C2−, C2+
Positive and Negative Connections for Charge Pump Capacitors. External Capacitors C1 and C2 are
connected between these pins; a 0.1 μF capacitor is recommended, but larger capacitors of up to 10 μF
can be used.
D1 T
IN1
Transmitter (Driver) Input 1. A logic low on this input generates a high on T
OUT1
; a logic high on this
input generates a low on T
OUT1
. This pin accepts TTL/CMOS levels. This is a high impedance input pin;
therefore, it should not be left floating.
D10, E10, F10, H10,
J10, K10, L10
GND
ISO
Ground Reference for Isolated RS-232 Side.
D11 T
OUT1
Transmitter (Driver) Output 1. This pin outputs RS-232 signal levels.
F1 T
IN2
Transmitter (Driver) Input 2. A logic low on this input generates a high on T
OUT2
; a logic high on this
input generates a low on T
OUT2
. This pin accepts TTL/CMOS levels. This is a high impedance input pin;
therefore, it should not be left floating.
F11 T
OUT2
Transmitter (Driver) Output 2. This pin outputs RS-232 signal levels.
H1 R
OUT1
Receiver Output 1. This pin outputs CMOS logic levels.
H11 R
IN1
Receiver Input 1. A logic low on this input generates a high on R
OUT1
; a logic high on this input generates a
low on R
OUT1
. This input pin accepts RS-232 signal levels and has an internal 5 kΩ pull-down resistor.
J11 V− Internally Generated Negative Supply.
K1 R
OUT2
Receiver Output 2. This pin outputs CMOS logic levels.
K11 R
IN2
Receiver Input 2. A logic low on this input generates a high on R
OUT2
; a logic high on this input generates a
low on R
OUT2
. This input pin accepts RS-232 signal levels and has an internal 5 kΩ pull-down resistor.
10515-002
A
1234567891011
B
C
D
E
F
G
H
J
K
L
BALLS IN COLUMN 3 TO
COLUMN 9 REMOVED
FOR ISOLATION
TOP VIEW
(Not to Scale)
ADM3252E
V
CC
V
CC
GND
GND
GND
GND
GND
GND
GND
GND
GND
NC
V
CC
GND
T
IN1
GND
T
IN2
GND
R
OUT1
GND
R
OUT2
NC
V
ISO
V
ISO
V
ISO
GND
ISO
GND
ISO
GND
ISO
C2–
GND
ISO
GND
ISO
GND
ISO
GND
ISO
DNC
V+
C1+
T
OUT1
C1–
T
OUT2
C2+
R
IN1
V–
R
IN2
DNC