Datasheet

ADM3252E Data Sheet
Rev. A | Page 10 of 16
THEORY OF OPERATION
Figure 15. Functional Block Diagram
The ADM3252E is a high speed, 2.5 kV, fully isolated, dual-
channel RS-232 transceiver device that operates from a single
power supply.
The internal circuitry consists of the following main sections:
 Isolation of power and data
 Charge pump voltage converter
 3.3 V logic to EIA/TIA-232E transmitter
 EIA/TIA-232E to 3.3 V logic receiver
ISOLATION OF POWER AND DATA
The ADM3252E incorporates a dc-to-dc converter section,
which works on principles that are common to most power
supply designs. V
CC
power is supplied to an oscillating circuit
that switches current into a chip scale air core transformer. Power
is transferred to the secondary side where it is rectified to a high
dc voltage. The power is then linearly regulated to 3.3 V and
supplied to the secondary side data section and to the V
ISO
pin.
Because the oscillator runs at a constant high frequency
independent of the load, excess power is internally dissipated
in the output voltage regulation process. Limited space for
transformer coils and components adds to the internal power
dissipation. This results in low power conversion efficiency.
The transmitter input (T
INx
) accepts TTL/CMOS input levels.
The driver input signal that is applied to the T
INx
pins is
referenced to logic ground (GND). It is coupled across the
isolation barrier, inverted, and then appears at the transceiver
section, referenced to isolated ground (GND
ISO
).
Similarly, the receiver input (R
INx
) accepts RS-232 signal levels
referenced to isolated ground (GND
ISO
). The R
INx
input is
inverted and coupled across the isolation barrier to appear at
the R
OUTx
pin, referenced to logic ground (GND).
The digital signals are transmitted across the isolation barrier
using iCoupler technology. Chip scale transformer windings
couple the digital signals magnetically from one side of the
barrier to the other. Digital inputs are encoded into waveforms
that are capable of exciting the primary transformer of the winding.
At the secondary winding, the induced waveforms are decoded
into the binary value that was originally transmitted.
Figure 16. Typical Operating Circuit
RECT REG
V–
C4
0.1µF
16V
VOLTAGE
DOUBLER
C1+ C1– V+ V
ISO
C2+ C2–
VOLTAGE
INVERTER
V
CC
GND GND
ISO
ADM3252E
OSC
DECODE
R
R
OUT1
R
IN1
*
ENCODE
T
IN1
T
T
OUT1
ENCODE DECODE
DECODE
R
R
OUT2
R
IN2
*
ENCODE
T
IN2
T
T
OUT2
ENCODE DECODE
10µF
0.1µF
C3
0.1µF
10V
C2
0.1µF
16V
0.1µF
10µF
C1
0.1µF
16V
*INTERNAL 5kΩ PULL-DOWN RESISTOR ON THE RS-232 INPUTS.
10515-003
+
C3
0.1µF
10V
+
C1
0.1µF
16V
+
C2
0.1µF
16V
0.1µF
+
C4
0.1µF
16V
V
ISO
V+
C1+
C1–
EIA/TIA-232E OUTPUT
T
OUT1
EIA/TIA-232E INPUT
R
IN1
EIA/TIA-232E OUTPUT
T
OUT2
EIA/TIA-232E INPUT
R
IN2
C2+
C2–
V–
GND
ISO
ISOLATION
BARRIER
CMOS OUTPUT
R
OUT1
CMOS OUTPUT
R
OUT2
CMOS INPUT
T
IN1
CMOS INPUT
T
IN2
GND
3.0V TO 5.5
V
V
CC
0.1µF10µF
ADM3252E
10µF
10515-004