Datasheet

ADM2491E
Rev. B | Page 7 of 16
PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS
V
DD1
1
GND
1
2
RxD
3
RE
4
V
DD2
16
GND
2
15
A
14
B
13
DE
5
Z
12
TxD
6
Y
11
NC
7
NC
10
GND
1
8
GND
2
9
NC = NO CONNECT
ADM2491E
TOP VIEW
(Not to Scale)
06985-002
Figure 2. ADM2491E Pin Configuration
Table 8. Pin Function Descriptions
Pin No. Mnemonic Description
1 V
DD1
Power Supply (Logic Side). Decoupling capacitor to GND
1
required; capacitor value should be between
0.01 µF and 0.1 µF.
2, 8 GND
1
Ground (Logic Side).
3 RxD Receiver Output.
4
RE
Receiver Enable Input. Active low logic input. When this pin is low, the receiver is enabled; when high, the
receiver is disabled.
5 DE Driver Enable Input. Active high logic input. When this pin is high, the driver (transmitter) is enabled;
when low, the driver is disabled.
6 TxD Transmit Data.
7, 10 NC No Connect. This pin must be left floating.
9, 15 GND
2
Ground (Bus Side).
11 Y Driver Noninverting Output.
12 Z Driver Inverting Output.
13 B Receiver Inverting Input.
14 A Receiver Noninverting Input.
16 V
DD2
Power Supply (Bus Side). Decoupling capacitor to GND
2
is required; capacitor value should be between
0.01 µF and 0.1 µF.