Datasheet

ADM2484E Data Sheet
Rev. F | Page 12 of 16
CIRCUIT DESCRIPTION
ELECTRICAL ISOLATION
In the ADM2484E, electrical isolation is implemented on the
logic side of the interface. Therefore, the part has two main
sections: a digital isolation section and a transceiver section
(see Figure 25). The driver input signal, which is applied to the
TxD pin and referenced to the logic ground (GND
1
), is coupled
across an isolation barrier to appear at the transceiver section
referenced to the isolated ground (GND
2
). Similarly, the receiver
input, which is referenced to the isolated ground in the transceiver
section, is coupled across the isolation barrier to appear at the
RxD pin referenced to the logic ground.
iCoupler Technology
The digital signals transmit across the isolation barrier using
iCoupler technology. This technique uses chip scale transformer
windings to couple the digital signals magnetically from one
side of the barrier to the other. Digital inputs are encoded into
waveforms that are capable of exciting the primary transformer
winding. At the secondary winding, the induced waveforms are
decoded into the binary value that was originally transmitted.
Positive and negative logic transitions at the input cause narrow
(approximately 1 ns) pulses to be sent to the decoder via the
transformer. The decoder is bistable and is, therefore, set or reset
by the pulses, indicating input logic transitions. In the absence of
logic transitions at the input for more than approximately 1 μs,
a periodic set of refresh pulses, indicative of the correct input
state, are sent to ensure dc correctness at the output. If the
decoder receives no internal pulses for more than about 5 μs,
then the input side is assumed to be unpowered or nonfunctional,
in which case the output is forced to a default state (see Table 11).
ISOLATION
BARRIER
V
DD2
V
DD1
A
B
GND
2
GND
1
DE
RxD
RE
ENCODE
DECODE
DECODE
ENCODE
R
TRANSCEIVERDIGITAL ISOLATION
Y
Z
TxD
DECODEENCODE
D
06984-023
Figure 25. Digital Isolation and Transceiver Sections
TRUTH TABLES
The truth tables in this section use the abbreviations shown
in Table 10.
Table 10. Truth Table Abbreviations
Letter Description
H High level
L Low level
I Indeterminate
X Irrelevant
Z High impedance (off)
NC Disconnected
Table 11. Transmitting
Supply Status Inputs Outputs
V
DD1
V
DD2
DE TxD Y Z
On On H H H L
On On H L L H
On On L X Z Z
On Off X X Z Z
Off On L X Z Z
Off Off X X Z Z
Table 12. Receiving
Supply Status Inputs Output
V
DD1
V
DD2
A − B (V)
RE
RxD
On On > −0.03 L or NC H
On On < −0.2 L or NC L
On On −0.2 < A − B < −0.03 L or NC I
On On Inputs open L or NC H
On On X H Z
On Off X L or NC H
Off Off X L or NC L