Datasheet

ADM2483
Rev. B | Page 17 of 20
APPLICATIONS INFORMATION
POWER_VALID INPUT
To avoid chatter on the A and B outputs caused by slow power-
up and power-down transients on V
DD1
(>100 µs/V), the
ADM2483 features a power_valid (PV) digital input. This pin
should be driven low until V
DD1
exceeds 2.0 V. When V
DD1
is
greater than 2.0 V, the pin should be driven high. Conversely,
upon power-down, the PV should be driven low before V
DD1
reaches 2.0 V.
The power_valid input can be driven, for example, by the
output of a system reset circuit such as the ADM809Z, which
has a threshold voltage of 2.32 V.
04736-029
V
DD1
2.32V
t
POR
2.0V
2.32V
2.0V
RESET
RESET
ADM809Z
ADM2483
V
DD1
PV
GND
1
V
DD1
Figure 29. Driving PV with ADM809Z
ISOLATED POWER SUPPLY CIRCUIT
The ADM2483 requires isolated power capable of 5 V at
100 mA to be supplied between the V
DD2
and GND
2
pins. If no
suitable integrated power supply is available, a discrete circuit,
such as the one in Figure 30, can be used. A center-tapped
transformer provides electrical isolation. The primary winding
is excited with a pair of square waveforms that are 180° out of
phase with each other. A pair of Schottky diodes and a
smoothing capacitor are used to create a rectified signal from
the secondary winding. The ADP667 linear voltage regulator
provides a regulated power supply to the ADM2483’s bus-side
circuitry.
To create the pair of square waves, a D-type flip-flop with
complementary Q/
Q
outputs is used. The flip-flop can be
connected so that output Q follows the clock input signal. If no
local clock signal is available, a simple digital oscillator can be
implemented with a hex-inverting Schmitt trigger and a resistor
and capacitor. In this case, values of 3.9 kΩ and 1 nF generate a
364 kHz square wave. A pair of discrete NMOS transistors,
switched by the Q/
Q
flip-flop outputs, conduct current through
the center tap of the primary transformer, winding in an
alternating fashion.
04736-030
3.9kΩ
100nF
1nF
74HC14
V
CC
74HC74A
PR CLR
DQ
CLK Q
BS107A
BS107A
V
CC
ISOLATION
BARRIER
SD103C
22µF
SD103C
78253
100nF
V
CC
IN OUT
5V
SET SHDNGND
ADP667
V
DD1
V
DD2
GND
1
GND
2
ADM2483
V
CC
Figure 30. Isolated Power Supply Circuit