Datasheet

ADM2483 Data Sheet
Rev. F | Page 8 of 18
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
04736-002
NC = NO CONNECT
ADM2483
TOP VIEW
(Not to Scale)
V
DD1
1
V
DD2
16
GND
1
1
2
GND
2
1
15
RxD
3
NC
14
RE
4
B
13
DE
5
A
12
TxD
6
NC
11
PV
7
NC
10
GND
1
1
8
GND
2
1
9
1
PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED.
EITHER OR BOTH MAY BE USED FOR GND
1
.
PIN 9 AND PIN 15 ARE INTERNALLY CONNECTED.
EITHER OR BOTH MAY BE USED FOR GND
2
.
Figure 2. Pin Configuration
Table 9. Pin Function Descriptions
Pin No.
Mnemonic
Description
1 V
DD1
Power Supply (Logic Side).
2, 8
GND
1
Ground (Logic Side).
3 RxD
Receiver Output Data. When enabled, if (A − B) ≥ −30 mV, then RxD = high. If (A − B) ≤ −200 mV, then
RxD = low. This is a tristate output when the receiver is disabled, that is, when
RE is driven high.
4
RE Receiver Enable Input. This is an active-low input. Driving this input low enables the receiver, and
driving it high disables the receiver.
5 DE Driver Enable Input. Driving the input high enables the driver, and driving it low disables the driver.
6 TxD Transmit Data Input. Data to be transmitted by the driver is applied to this input.
7 PV Power_Valid. Used during power-up and power-down. See the Applications Information section.
9, 15 GND
2
Ground (Bus Side).
10, 11, 14 NC No Connect.
12 A
Noninverting Driver Output/Receiver Input. When the driver is disabled, or when V
DD1
or V
DD2
is
powered down, Pin A is put into a high impedance state to avoid overloading the bus.
13 B
Inverting Driver Output/Receiver Input. When the driver is disabled, or when V
DD1
or V
DD2
is powered
down, Pin B is put into a high impedance state to avoid overloading the bus.
16 V
DD2
Power Supply (Bus Side).
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