Datasheet
ADM12914 Data Sheet
Rev. D | Page 12 of 16
Next, consider a −5 V input, which is specified with a ±12%
input. The threshold accuracy required by the supply is chosen
to be within ±5% of the −5 V rail. The UV and OV threshold
should be set in the middle of the undervoltage and overvoltage
monitoring bands, respectively. In this case, on the ±8.5%
points of the supply, which is −4.575 V for the UV threshold
and −5.425 V for the OV threshold.
The negative voltage scheme configuration requires that the 1 V
reference voltage be accounted for in Equation 1 to Equation 3.
The 1 V reference voltage is subtracted from V
M
, V
UV
, and V
OV
,
and the absolute value of the result is taken.
Equation 1 becomes
kΩ1.93
6
1051425.5
15)5.0(
Z
R
Insert the value of R
Z
into Equation 2
kΩ3.14kΩ1.93
1051575.4
15)5.0(
6
Y
R
To c alc ul ate R
X
, insert the value of R
Z
and R
Y
into Equation 3.
MΩ09.1Ωk1.93Ωk3.14
105
15
6
X
R
POWER-UP AND POWER-DOWN
On power-up, when V
CC
reaches 1 V, the active low
UV
output
asserts and the
OV
output pulls up to V
CC
. When the voltage on
the V
CC
pin reaches 1 V, the ADM12914 is guaranteed to assert
UV
low and
OV
high. When V
CC
exceeds 1.9 V (minimum), the
VHx and VLx inputs take control. When V
CC
and each of the
VHx inputs are valid, an internal timer begins. Subsequent to
an adjustable time delay,
UV
weakly pulls high.
UV/OV TIMING CHARACTERISTICS
UV
is an active low output. It asserts when any of the four moni-
tored voltages is below its associated threshold. When the
voltage on the V
CC
pin is greater than 2 V, an internal timer
holds
UV
low for an adjustable period, t
UOTO
, after the voltages
on all the monitoring rails rise above their thresholds. This
allows time for all monitored power supplies to stabilize after
power-up. Similarly, any monitored voltage that falls below its
threshold initiates a timer reset, and the internal timer restarts
once all the monitoring rails rise above their thresholds.
The
UV
and
OV
outputs are held asserted after all faults have
cleared for an adjustable timeout period, determined by the
value of the external capacitor attached to the TIMER pin.
TIMER CAPACITOR SELECTION
The
UV
and
OV
timeout period on the ADM12914 is program-
mable via the external timer capacitor, C
TIMER
, placed between
the TIMER pin and ground. The timeout period, t
UOTO
, is
calculated using the following equation:
C
TIMER
= (t
UOTO
)(115)(10
−9
) F/sec
Refer to Figure 15 in the Typical Performance Characteristics
section, which illustrates the delay time as a function of the
timer capacitor value. A minimum capacitor value of 10 pF is
required. The chosen timer capacitor must have a leakage current
that is less than the 1.7 μA TIMER pin charging current. To
bypass the timeout period, connect the TIMER pin to V
CC
.
V
Hx MONITOR TIMING
t
UOD
t
UOTO
VHx
UV
V
UOT
1V
VHx MONITOR TIMING
(TIMER PIN TIED TO V
CC
)
t
UOD
t
UOD
VHx
UV
V
UOT
1V
NOTES
1. WHEN AN INPUT IS CONFIGURED TO MONITOR A NEGATIVE
VOLTAGE, VHx TRIGGERS AN OVERVOLTAGE CONDITION.
08265-026
Figure 21. VHx Positive Voltage Monitoring Timing Diagrams
V
Lx MONITOR TIMING
t
UOD
t
UOTO
VLx
OV
V
UOT
1V
VLx MONITOR TIMING
(TIMER PIN TIED TO V
CC
)
t
UOD
t
UOD
VLx
OV
V
UOT
1V
NOTES
1. WHEN AN INPUT IS CONFIGURED TO MONITOR A NEGATIVE
VOLTAGE, VLx TRIGGERS AN UNDERVOLTAGE CONDITION.
08265-027
Figure 22. VLx Positive Voltage Monitoring Timing Diagrams