Datasheet

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Hot Swap Controller and Digital Power and

Energy Monitoring with PMBus Interface

Data Sheet

ADM1276

Rev. C Document Feedback

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FEATURES

Controls supply voltages from 2 V to 20 V

370 ns response time to short circuit

Resistor-programmable 5 mV to 25 mV current limit

±1% accurate, 12-bit ADC for current, V

OUT

readback

Charge pumped gate drive for multiple external N-channel FETs

High gate drive voltage to ensure lowest R

DSON

Foldback for tighter FET SOA protection

Automatic retry or latch-off on current fault

Programmable current-limit timer for SOA

Programmable, multifunction GPO

Power-good status output

Analog UV and OV protection

ENABLE pin

Reports power and energy consumption over time

Peak detect registers for current and voltage

PMBus fast mode compliant interface

20-lead LFCSP

APPLICATIONS

Power monitoring and control/power budgeting

Central office equipment

Telecommunication and data communication equipment

PCs/servers

GENERAL DESCRIPTION

The ADM1276 is a hot swap controller that allows a circuit board

to be removed from or inserted into a live backplane. It also features

current and voltage readback via an integrated 12-bit analog-to-

digital converter (ADC), accessed using a PMBus™ interface.

The load current is measured using an internal current sense

amplifier that measures the voltage across a sense resistor in

the power path via the SENSE+ and SENSE− pins. A default

limit of 20 mV is set, but this limit can be adjusted, if required,

using a resistor divider network from the internal reference

voltage to the ISET pin.

The ADM1276 limits the current through the sense resistor by

controlling the gate voltage of an external N-channel FET in the

power path, via the GATE pin. The sense voltage—and, therefore,

the load current—is maintained below the preset maximum. The

ADM1276 protects the external FET by limiting the time that the

FET remains on while the current is at its maximum value. This

current-limit time is set by the choice of capacitor connected to

the TIMER pin. In addition, a foldback resistor network can be

used to actively lower the current limit as the voltage across the

FET is increased. This helps to maintain constant power in the

FUNCTIONAL BLOCK DIAGRAM

09718-001

GATE

SENSE+

TIMER

ADM1276-3

GND

SENSE–

VCC

VCAP

ENABLE

IOUT

1.0V

VOUT

12-BIT

ADC

SCL

SDA

ADR

SENSE+

IOUT

LDO

CHARGE

PUMP

TIMEOUT

GPO2/ALERT2

PWRGD

LATCH

TIMER ON

CURRENT

LIMIT

FLB

ISET

TIMEOUT

CURRENT

LIMIT

CONTROL

REF

SELECT

1.0V

GATE

DRIVE/

LOGIC

AND

PMBus

×50

–

Figure 1.

FET and allows the safe operating area (SOA) to be adhered to

in an effective manner.

In case of a short-circuit event, a fast internal overcurrent

detector responds within 370 ns and signals the gate to shut

down. A 1500 mA pull-down device ensures a fast FET response.

The ADM1276 features overvoltage (OV) and undervoltage (UV)

protection, programmed using external resistor dividers on the

UV and OV pins. A PWRGD signal can be used to detect when

the output supply is valid, using the FLB pin to monitor the output.

A GPO pin can be configured as an output signal that can be

asserted when a programmed current or voltage level is reached.

The 12-bit ADC can measure the current in the sense resistor,

as well as the supply voltage on the SENSE+ pin or the output

voltage. A PMBus interface allows a controller to read current

and voltage data from the ADC. Measurements can be initiated

by a PMBus command. Alternatively, the ADC can run conti-

nuously, and the user can read the latest conversion data whenever

required. As many as four unique PMBus addresses can be selected,

depending on the way that the ADR pin is connected.

The ADM1276 is available in a 20-lead LFCSP with a

LATCH

that can be configured for automatic retry or latch-off when an

overcurrent fault occurs.

Summary of content (48 pages)

PAGE 1
FEATURES FUNCTIONAL BLOCK DIAGRAM Controls supply voltages from 2 V to 20 V 370 ns response time to short circuit Resistor-programmable 5 mV to 25 mV current limit ±1% accurate, 12-bit ADC for current, VIN/VOUT readback Charge pumped gate drive for multiple external N-channel FETs High gate drive voltage to ensure lowest RDSON Foldback for tighter FET SOA protection Automatic retry or latch-off on current fault Programmable current-limit timer for SOA Programmable, multifunction GPO Power-good status outp
PAGE 2
ADM1276 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Power Monitor Commands ...................................................... 28 Applications ....................................................................................... 1 Warning Limit Setup Commands ............................................ 29 General Description .........................................................................
PAGE 3
Data Sheet ADM1276 PMON_CONFIG ........................................................................42 READ_PIN_EXT ........................................................................ 44 ALERT2_CONFIG .....................................................................43 READ_EIN_EXT ........................................................................ 44 DEVICE_CONFIG .....................................................................44 Outline Dimensions ..............................
PAGE 4
ADM1276 Data Sheet SPECIFICATIONS VCC = 2.95 V to 20 V, VCC ≥ VSENSE+, VSENSE+ = 2 V to 20 V, VSENSE = (VSENSE+ − VSENSE−) = 0 V, TA = −40°C to +85°C, unless otherwise noted. Table 1.
PAGE 5
Data Sheet ADM1276 Parameter Foldback Active Symbol Min 3.5 9.6 Typ 4 10 Max 4.5 10.4 Unit mV mV Circuit Breaker Offset SEVERE OVERCURRENT Voltage Threshold VCBOS 0.6 0.88 1.12 mV VSENSEOC 40 9.5 90 50 13.0 200 mV mV ns 530 900 ns 180 645 370 1020 ns ns 2 mV overdrive maximum severe overcurrent threshold −8 1.
PAGE 6
ADM1276 Parameter GPO2/ALERT2 PIN Output Low Voltage Data Sheet Symbol Min Typ Max Unit Test Conditions/Comments VOL_GPO2 0.4 1.5 100 1 V V nA µA IGPO2 = 1 mA IGPO2 = 5 mA VGPO2 ≤ 2 V; GPO output high-Z VGPO2 = 20 V; GPO output high-Z VOL_PWRGD 0.4 1.5 V V V IPWRGD = 1 mA IPWRGD = 5 mA ISINK = 100 μA; VOL_PWRGD = 0.4 V 100 1 nA µA VPWRGD ≤ 2 V; PWRGD output high-Z VPWRGD = 20 V; PWRGD output high-Z ±0.75 ±0.8 ±1.1 ±2.0 ±4.3 ±1.
PAGE 7
Data Sheet ADM1276 Parameter Address Set to 11 Input Current for Address 11 SERIAL BUS DIGITAL INPUTS (SDA, SCL) Input High Voltage Input Low Voltage Output Low Voltage Input Leakage Symbol Min 2 VIH VIL VOL ILEAK-PIN Nominal Bus Voltage Capacitance for SDA, SCL Pins Input Glitch Filter Typ Max 3 10 Unit V μA 1.1 −10 −5 2.7 VDD CPIN 0.8 0.4 +10 +5 5.5 V V V μA μA V pF 50 ns 5 tSP 0 Test Conditions/Comments Connect to VCAP VADR = 2.
PAGE 8
ADM1276 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 3. Parameter VCC Pin UV Pin OV Pin SS Pin TIMER Pin VCAP Pin ISET Pin LATCH Pin SCL Pin SDA Pin ADR Pin ENABLE Pin GPO2/ALERT2 Pin PWRGD Pin FLB Pin VOUT Pin GATE Pin (Internal Supply Only)1 SENSE+ Pin SENSE− Pin VSENSE (VSENSE+ − VSENSE−) Continuous Current into Any Pin Storage Temperature Range Operating Temperature Range Lead Temperature, Soldering (10 sec) Junction Temperature 1 Rating −0.3 V to +25 V −0.3 V to +4 V −0.3 V to +4 V −0.3 V to VCAP + 0.
PAGE 9
Data Sheet ADM1276 20 19 18 17 16 UV VCC SENSE+ SENSE– GATE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 3 4 5 PIN 1 INDICATOR ADM1276-3 TOP VIEW (Not to Scale) 15 GND 14 VOUT 13 FLB 12 PWRGD 11 SCL NOTES 1. SOLDER THE EXPOSED PADDLE TO THE BOARD TO IMPROVE THERMAL DISSIPATION. THE EXPOSED PADDLE CAN BE CONNECTED TO GROUND. 09718-003 LATCH 6 ADR 7 ENABLE 8 GPO2/ALERT2 9 SDA 10 OV VCAP ISET SS TIMER Figure 3. Pin Configuration Table 5. Pin Function Descriptions Pin No.
PAGE 10
ADM1276 Pin No. 14 Mnemonic VOUT 15 16 GND GATE 17 SENSE− 18 SENSE+ N/A 1 EP 1 Data Sheet Description Output Voltage. This pin is used to read back the output voltage using the internal ADC. A 1 kΩ resistor should be inserted in series between the source of a FET and the VOUT pin. Ground Pin. Gate Output Pin. This pin is the high-side gate drive of an external N-channel FET.
PAGE 11
Data Sheet ADM1276 TYPICAL PERFORMANCE CHARACTERISTICS 5 14 VCC = 12V 12 4 +85°C IGATEDN_SLOW (mA) ICC (mA) +25°C 3 –40°C 2 10 8 6 4 1 2 4 6 8 10 12 14 16 18 20 VCC (V) 0 –40 09718-004 0 –20 0 20 40 60 80 TEMPERATURE (°C) Figure 4. Supply Current (ICC) vs. Supply Voltage (VCC) 09718-007 2 Figure 7. Gate Pull-Down Current (IGATEDN_SLOW) vs. Temperature 5 15 14 13 4 VCC = 20V 12 VCC = 12V 11 IGATEDN_SLOW (mA) ICC (mA) VCC = 2.
PAGE 12
ADM1276 Data Sheet 16 30 VCC = 12V 14 25 +85°C +25°C 12 10 ΔVGATE (V) IGATEUP (µA) 20 VCC = 2.95V 15 –40°C 8 6 10 4 5 0 5 10 15 20 25 VGATE (V) 0 09718-010 0 Figure 10. Gate Pull-Up Current (IGATEUP) vs. Gate Voltage (VGATE) 2 4 6 8 10 12 14 16 18 20 VCC (V) 09718-013 2 Figure 13. Gate Drive Voltage (ΔVGATE) vs.
PAGE 13
Data Sheet ADM1276 1100 0 VCC = 12V HIGH THRESHOLD (VCC = 12V) 1000 –10 900 TIMER THRESHOLD (mV) ITIMERUPFLT (µA) –20 –30 –40 –50 –60 800 700 600 500 400 300 LOW THRESHOLD (VCC = 12V) 200 –70 –20 0 20 40 60 80 TEMPERATURE (°C) 0 –40 09718-016 –80 –40 –20 0 20 40 60 80 TEMPERATURE (°C) Figure 16. Timer Pull-Up Current, Overcurrent Fault (ITIMERUPFLT) vs. Temperature 09718-019 100 Figure 19. Timer Thresholds vs. Temperature 0 1.3 VCC = 12V 1.2 1.
PAGE 14
ADM1276 2.0 VCC = 12V 240 220 1.8 200 1.6 180 1.4 VCBOS (mV) 160 140 120 100 1.2 +85°C +25°C 1.0 0.8 80 –40°C 0.6 40 0.4 20 0.2 0 –40 –20 0 20 40 60 80 TEMPERATURE (°C) 0 4 2 6 8 10 12 14 16 18 20 VCC (V) 09718-025 60 09718-022 FOLDBACK CLAMP (mV) Data Sheet Figure 25. Circuit Breaker Offset (VCBOS) vs. Supply Voltage (VCC) Figure 22. Foldback Clamp vs.
PAGE 15
Data Sheet ADM1276 20 50 45 40 15 VCC = 20V 30 ∆VGATE (V) VSENSEOC (mV) 35 25 20 VCC = 12V 10 VCC = 2.95V 15 5 TA = 25°C 2 4 6 8 10 12 14 16 18 20 VCC (V) –2 –4 –6 –8 –10 –12 –14 –16 –18 –20 –22 –24 –26 IGATEUP (µA) 2.0 45 1.8 40 1.6 35 1.4 VOL_PWRGD (V) 50 30 25 20 1.0 0.8 0.6 10 0.4 5 VCC = 2.95V 1.2 15 VCC = 12V 0.2 VCC = 12V –20 0 20 40 60 80 TEMPERATURE (°C) 0 09718-029 0 –40 0 Figure 31. Gate Drive Voltage (ΔVGATE) vs.
PAGE 16
ADM1276 Data Sheet 3.0 3.0 2.5 10 DECODE 11 DECODE 2.0 VADR (V) 1.5 1.0 1.5 1.0 0.5 0.5 +85°C +25°C –40°C 100 IVCAP (µA) 0 –25 09718-034 50 0 –15 –10 –5 0 5 IADR (µA) Figure 34. VCAP Voltage (VVCAP) vs. VCAP Load (IVCAP) Figure 37. ADR Pin Voltage (VADR) vs. Current (IADR) 1200 1100 –20 09718-037 VVCAP (V) 01 DECODE 2.5 2.
PAGE 17
Data Sheet ADM1276 RSENSE 2V TO 20V 2.95V TO 20V SENSE+ ADM1276 CHARGE PUMP VCP LDO IOUT UV 1.0V + – 1.0V – + OV ISET SENSE– + – ×50 VCC VCAP Q1 REF SELECT 1.0V SS GATE DRIVE/ LOGIC + – CURRENTLIMIT CONTROL VCBOS TIMER ON TIMER TIMER SENSE+ VOUT IOUT GATE VOUT TIMEOUT CURRENT LIMIT TIMER ON FLB TIMEOUT 12-BIT ADC LOGIC AND PMBus PWRGD GPO2/ALERT2 LATCH SCL SDA ADR GND Figure 39. Typical Application Circuit Rev.
PAGE 18
ADM1276 Data Sheet THEORY OF OPERATION RSENSE 2.95V TO 20V When circuit boards are inserted into a live backplane, discharged supply bypass capacitors draw large transient currents from the backplane power bus as they charge. These transient currents can cause permanent damage to connector pins, as well as dips on the backplane supply that can reset other boards in the system.
PAGE 19
Data Sheet ADM1276 2.95V TO 20V V Q1 SS FLB SENSE+ SENSE– 1V ISET CURRENT-LIMIT REFERENCE BIAS CURRENT GATE 09718-043 VCC Figure 43. Connection of Multiple Sense Resistors to the SENSE± Pins 0.2V 0.1V CURRENT-LIMIT REFERENCE The current-limit reference voltage determines the load current level to which the ADM1276 limits the current during an overcurrent event. This reference voltage is compared to the gained-up current sense voltage to determine whether the limit is reached.
PAGE 20
ADM1276 Data Sheet FLB (see Figure 45). This change has minimal impact on startup because the output voltage rises at a similar rate to the SS voltage. VCAP C1 SENSE+ R1 ISET SENSE– ADM1276 + – ×50 ADM1276 VCP GATE DRIVE/ LOGIC R2 REF SELECT ISET VCAP CURRENT LIMIT Figure 47. Adjustable 5 mV to 25 mV Current Sense Limit SS The VCAP pin has a 2.7 V internal generated voltage that can be used to set a voltage at the ISET pin.
PAGE 21
Data Sheet ADM1276 TIMER The TIMER pin handles several timing functions with an external capacitor, CTIMER. The two comparator thresholds are VTIMERL (0.2 V) and VTIMERH (1 V). There are four timing current sources: a 3 μA pull-up, a 60 μA pull-up, a 2 μA pull-down, and a 100 μA pull-down. These current and voltage levels, together with the value of CTIMER chosen by the user, determine the initial timing cycle time, the fault current-limit time, and the hot swap retry duty cycle.
PAGE 22
ADM1276 Data Sheet FAST RESPONSE TO SEVERE OVERCURRENT UNDERVOLTAGE AND OVERVOLTAGE The ADM1276 monitors the supply voltage for undervoltage (UV) and overvoltage (OV) conditions. The UV and OV pins are connected to the input of an internal voltage comparator, and its voltage level is internally compared with a 1 V voltage reference. Figure 49 illustrates the voltage monitoring input connections. An external resistor network divides the supply voltage for monitoring.
PAGE 23
Data Sheet ADM1276 VOUT MEASUREMENT The VOUT pin on the ADM1276 can be used to provide an alternate voltage for the power monitor to measure. The user can choose to measure the voltage at the SENSE+ pin or the voltage at the VOUT pin, using either the low or high input voltage range. If the VOUT pin is to be used to measure the output voltage after the FET, insert a 1 kΩ resistor in series between the source of the FET and the VOUT pin.
PAGE 24
ADM1276 Data Sheet PMBus INTERFACE The I2C bus is a common, simple serial bus used by many devices to communicate. It defines the electrical specifications, the bus timing, the physical layer, and some basic protocol rules. SMBus is based on I2C and aims to provide a more robust and fault tolerant bus. Functions such as bus timeout and packet error checking are added to help achieve this robustness, along with more specific definitions of the bus messages used to read and write data to devices on the bus.
PAGE 25
Data Sheet ADM1276 SMBus MESSAGE FORMATS W is the write bit. A is the acknowledge bit (0). A is the acknowledge bit (1). Figure 52 to Figure 60 show all the SMBus protocols supported by the ADM1276, along with the PEC variant. In these figures, unshaded cells indicate that the bus host is actively driving the bus; shaded cells indicate that the ADM1276 is driving the bus. “A” represents the acknowledge bit.
PAGE 26
ADM1276 Data Sheet SLAVE ADDRESS S W DATA BYTE HIGH A SLAVE ADDRESS S COMMAND CODE A Sr SLAVE ADDRESS R A DATA BYTE LOW A A COMMAND CODE A Sr SLAVE ADDRESS R A DATA BYTE LOW A R A BYTE COUNT = N A A BYTE COUNT = N A P W DATA BYTE HIGH A PEC A P 09718-057 A MASTER TO SLAVE SLAVE TO MASTER Figure 57.
PAGE 27
Data Sheet ADM1276 A group command differs from a nongroup command in that after the data is written to one slave device, a repeated start condition is placed on the bus followed by the address of the next slave device and data. This continues until all of the devices have been written to, at which point the stop condition is placed on the bus by the master device. The format of a group command and a group command with PEC is shown in Figure 59 and Figure 60.
PAGE 28
ADM1276 Data Sheet bits, as well as pointer bits that indicate whether any of the four other status registers need to be read for more detailed status information. In the ADM1276, a particular distinction is made between faults and warnings. A fault is always generated by the hot swap controller and is defined by hardware component values. Three events can generate a fault: • • • Overcurrent condition that causes the hot swap timer to time out. Overvoltage condition on the OV pin.
PAGE 29
Data Sheet ADM1276 The power monitor can measure the following quantities: • • • Each time a power calculation is done, the 24-bit power value is added to a 24-bit energy accumulator register. This is a twos complement representation as well, so the MSB is always zero. Each time this energy accumulator register rolls over from 0x7FFFFF to 0x000000, a 16-bit rollover counter is incremented. The rollover counter is straight binary, with a maximum value of 0xFFFF before it rolls over. Input voltage (VIN).
PAGE 30
ADM1276 Data Sheet All comparisons performed by the power monitor require the measured value to be strictly greater or less than the threshold value. The same equations are used for voltage, current, and power conversions, the only difference being the values of the m, b, and R coefficients that are used. At power-up, all threshold limits are set to either minimum scale (for undervoltage or undercurrent conditions) or to maximum scale (for overvoltage or overcurrent or overpower conditions).
PAGE 31
Data Sheet ADM1276 Using Equation 1, and working with the 0 V to 20 V range, format values must be divided by 256 prior to being converted with the coefficients shown in Table 7. Y = ((6043 × 350) × 10-2 Example 3: The PIN_OP_WARN_LIMIT command requires a power limit value expressed in direct format. If the required power limit is 350 W and the sense resistor is 1 mΩ, the first step is to determine the m coefficient. Assuming the 0 V to 20 V range, m = 6043 × 1, which is 6043. Y = 21,150.
PAGE 32
ADM1276 Data Sheet VOLTAGE AND CURRENT CONVERSION USING LSB VALUES The direct format voltage and current values returned by the READ_VIN, READ_VOUT, and READ_IOUT commands, and the corresponding peak versions, are the data output directly by the ADM1276 ADC. Because the voltages and currents are 12-bit ADC output codes, they can also be converted to real-world values when there is knowledge of the size of the LSB on the ADC.
PAGE 33
Data Sheet ADM1276 GPO2/ALERT2 PIN BEHAVIOR The ADM1276 provides a very flexible alert system, whereby one or more fault/warning conditions can be indicated to an external device. FAULTS AND WARNINGS the GPO2/ALERT2 pin active. By default, the active state of the GPO2/ALERT2 pin is low.
PAGE 34
ADM1276 Data Sheet More than one device may have an active SMBAlert signal and attempt to communicate with the host. In this case, the device with the lowest address dominates the bus and succeeds in transmitting its address to the host. The device that succeeds disables its SMBus alert signal. If the host sees that the SMBus alert signal is still low, it continues to read addresses until all devices that need to talk to it have successfully transmitted their addresses.
PAGE 35
Data Sheet ADM1276 PMBus COMMAND REFERENCE Command codes are in hexadecimal format. Table 9.
PAGE 36
ADM1276 Data Sheet OPERATION Code: 0x01, read/write byte. Value after reset: 0x80. Table 10. Bit Descriptions for OPERATION Command Bits [7] Bit Name On [6:0] Reserved Settings 0 1 0000000 Description Hot swap output is disabled. Default. Hot swap output is enabled. Always reads as 0000000. CLEAR_FAULTS Code: 0x03, send byte, no data. CAPABILITY Code: 0x19, read byte. Value after reset: 0xB0. Table 11.
PAGE 37
Data Sheet ADM1276 VIN_OV_WARN_LIMIT Code: 0x57, read/write word. Value after reset: 0x0FFF. Table 16. Bit Descriptions for VIN_OV_WARN_LIMIT Command Bits [15:12] [11:0] Bit Name Reserved VIN_OV_WARN_LIMIT Settings 0000 Description Always reads as 0000. Overvoltage threshold for the SENSE+ pin measurement, expressed in ADC codes. VIN_UV_WARN_LIMIT Code: 0x58, read/write word. Value after reset: 0x0000. Table 17.
PAGE 38
ADM1276 Data Sheet STATUS_WORD Code: 0x79, read word. Value after reset: 0x0000. Table 20. Bit Descriptions for STATUS_WORD Command Bits [15] Bit Name VOUT_STATUS Behavior Live [14] IOUT_STATUS Live [13] INPUT_STATUS Live [12] MFR_STATUS Live [11] POWER_GOOD# Live Settings 0 1 0 1 0 1 0 1 0 1 [10:8] [7:0] Reserved STATUS_BYTE 000 Description There are no active status bits to be read by STATUS_VOUT. There are one or more active status bits to be read by STATUS_VOUT.
PAGE 39
Data Sheet ADM1276 STATUS_INPUT Code: 0x7C, read byte. Value after reset: 0x00. Table 23. Bit Descriptions for STATUS_INPUT Command Bits [7] Bit Name VIN_OV_FAULT Behavior Latched [6] VIN_OV_WARN Latched Settings 0 1 0 1 [5] VIN_UV_WARN Latched 0 1 [4] VIN_UV_FAULT Latched [3:1] [0] Reserved PIN_OP_WARN Latched 0 1 000 0 1 Description No overvoltage detected on the OV pin. An overvoltage was detected on the OV pin.
PAGE 40
ADM1276 Data Sheet READ_EIN Code: 0x86, block read. Value after reset: 0x06, 0x0000, 0x00, 0x000000. Table 25. Byte Descriptions for READ_EIN Command Byte [0] Byte Name Byte count Value 0x06 [2:1] Energy count 0x0000 [3] Rollover count 0x00 [6:4] Sample count 0x000000 Description Always reads as 0x06, the number of data bytes that the block read command should expect to read. Energy accumulator value in direct format. Byte 2 is the high byte, and Byte 1 is the low byte.
PAGE 41
Data Sheet ADM1276 MFR_ID Code: 0x99, block read. Value after reset: 0x03 + ASCII “ADI.” Table 31. Byte Descriptions for MFR_ID Command Byte [0] Byte Name Byte count Value 0x03 [1] [2] [3] Character 1 Character 2 Character 3 0x41 or “A” 0x44 or “D” 0x49 or “I” Description Always reads as 0x03, the number of data bytes that the block read command expects to read. Always reads as 0x41. Always reads as 0x44. Always reads as 0x49. MFR_MODEL Code: 0x9A, block read.
PAGE 42
ADM1276 Data Sheet PEAK_VOUT Code: 0xD2, read/write word. Value after reset: 0x0000 (writing 0x0000 clears the peak value). Table 36. Bit Descriptions for PEAK_VOUT Command Bits [15:12] [11:0] Bit Name Reserved PEAK_VOUT Settings 0000 Description Always reads as 0000. Returns the peak VOUT voltage since the register was last cleared. PMON_CONTROL Code: 0xD3, read/write byte. Value after reset: 0x01. Table 37.
PAGE 43
Data Sheet ADM1276 ALERT2_CONFIG Code: 0xD6, read/write word. Value after reset: 0x8000. Table 39.
PAGE 44
ADM1276 Data Sheet DEVICE_CONFIG Code: 0xD8, read/write byte. Value after reset: 0x00. Table 40. Bit Descriptions for DEVICE_CONFIG Command Bits [7] Bit Name OC_GLITCH_TIME Settings 0 [6] FLB_DISABLE 1 0 1 [5] OPERATION_CMD_EN 0 [4] IOUT_WARN2_SELECT [3:0] Reserved 1 0 1 0000 Description Default. The long duration glitch filter is used when a severe overcurrent fault is detected. The short duration glitch filter is used when a severe overcurrent fault is detected. Default.
PAGE 45
Data Sheet ADM1276 OUTLINE DIMENSIONS PIN 1 INDICATOR 5.10 5.00 SQ 4.90 0.35 0.28 0.23 0.65 BSC 20 16 15 PIN 1 INDICATOR 1 EXPOSED PAD 3.25 3.10 SQ 2.95 5 11 0.80 0.75 0.70 0.70 0.60 0.40 10 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF SEATING PLANE 6 0.25 MIN BOTTOM VIEW FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-WHHC. 111908-A TOP VIEW Figure 61.
PAGE 46
ADM1276 Data Sheet NOTES Rev.
PAGE 47
Data Sheet ADM1276 NOTES Rev.
PAGE 48
ADM1276 Data Sheet NOTES I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ©2011–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09718-0-11/13(C) Rev.