Datasheet
ADM1191 Data Sheet
Rev. C | Page 10 of 16
Base Address A1 Pin State A0 Pin State A1 Pin Logic State A0 Pin Logic State Address in Binary
1
Address in Hex
Floating Floating 10 10 0111010X 0x74
Floating High 10 11 0111011X 0x76
High Ground 11 00 0111100X 0x78
High Resistor to ground 11 01 0111101X 0x7A
High
Floating
11
10
0111110X
0x7C
High High 11 11 0111111X 0x7E
1
X = don’t care.
ACKNOWLEDGE BY
SLAVE
ACKNOWLEDGE BY
SLAVE
SCL
(CONTINUED)
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
1
9
1
9
STOP
BY
MASTER
SDA
(CONTINUED)
FRAME 3
DATA BYTE
FRAME N
DATA BYTE
SCL
START BY MASTER
1
9
1
9
D7
D6
D5
D4
D3
D2 D1
D0
ACKNOWLEDGE BY
SLAVE
ACKNOWLEDGE BY
SLAVE
FRAME 1
SLAVE ADDRESS
FRAME 2
COMMAND CODE
05804-004
SDA
A0A A0B
R/W
A1BA1A
1
1
0
Figure 16. General I
2
C Write Timing Diagram
SCL
START BY MASTER
1
9
1
9
D7
D6
D5
D4
D3
D2 D1
D0
ACKNOWLEDGE BY
SLAVE
ACKNOWLEDGE BY
MASTER
NO ACKNOWLEDGE
ACKNOWLEDGE BY
MASTER
FRAME 1
SLAVE ADDRESS
FRAME 2
DATA BYTE
SCL
(CONTINUED)
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
1
9
1
9
STOP
BY
MASTER
SDA
(CONTINUED)
FRAME 3
DATA BYTE
FRAME N
DATA BYTE
05804-005
SDA
A0A A0B
R/W
A1BA1A
1
1
0
Figure 17. General I
2
C Read Timing Diagram
SCLSCL
SDA
P
S
t
HD;STA
t
HD;DAT
t
HIGH
t
SU;DAT
t
SU;STA
t
HD;STA
t
F
t
R
t
LOW
t
BUF
t
SU;STO
P
S
05804-006
Figure 18. Serial Bus Timing Diagram