Datasheet

ADM1184
Rev. 0 | Page 11 of 12
VOLTAGE MONITORING AND SEQUENCING APPLICATION
2
.5V OU
T
3.3V IN
1.8V OU
T
1.2V OU
T
2.5V OUT
1.8V OUT
1.2V OUT
OUT1VIN1
OUT2VIN2
OUT3VIN3
VIN4
GND PWRGD
POWER
GOOD
VCC
ADM1184
GND
REGULATOR 1
IN
EN OUT
GND
REGULATOR 2
IN
EN OUT
GND
REGULATOR 3
IN
EN OUT
07352-020
Figure 20. Voltage-Monitoring and Sequencing Application Diagram
Figure 20 depicts an application in which the ADM1184 monitors
four separate voltage rails, turns on three regulators in a sequence,
and generates a power-good signal to turn on a controller when
all power supplies are up and stable.
The main supply, in this case 3.3 V, powers up the device via the
VCC pin. The VIN1 pin monitors the main 3.3 V supply. In this
example application, OUT1 is connected to the enable pin of a
regulator. Before the voltage on VIN1 reaches 0.6 V, this output is
switched to ground, disabling Regulator 1.
When the main system voltage reaches 2.9 V, VIN1 detects 0.6 V.
This causes OUT1 to assert, which drives the enable pin of
Regulator 1 high, thus turning on its output.
The 2.5 V output of this regulator begins to rise and is detected
by input Pin VIN2. When VIN2 detects the 2.5 V rail rising
above its voltage threshold point, it asserts OUT2, which turns
on Regulator 2. The same scheme is implemented with the other
input and output pins. Every rail that is turned on via an output
pin, OUTx, is monitored via an input pin, VIN(x + 1).
When all four monitored supplies are above their programmed
threshold levels PWRGD asserts after a 190 ms (typical) delay.