Datasheet

ADM1075 Data Sheet
Rev. B | Page 50 of 52
READ VAUX REGISTER
Address: 0xDD, Reset: 0x0000, Name: READ_VAUX
Table 40. Bit Descriptions for READ_VAUX
Bits Bit Name Settings Description Reset Access
[15:12] RESERVED Always reads as 0000. 0x0 R
[11:0] READ_VAUX Output voltage from the ADC_AUX pin measurement, expressed in
ADC codes.
0x0 R
VAUX OV WARN LIMIT REGISTER
Address: 0xDE, Reset: 0x0FFF, Name: VAUX_OV_WARN_LIMIT
Table 41. Bit Descriptions for VAUX_OV_WARN_LIMIT
Bits Bit Name Settings Description Reset Access
[15:12] RESERVED Always reads as 0000. 0x0 R
[11:0] VAUX_OV_WARN_LIMIT Overvoltage threshold for the ADC_AUX pin measurement,
expressed in ADC codes.
0xFFF RW
VAUX UV WARN LIMIT REGISTER
Address: 0xDF, Reset: 0x0000, Name: VAUX_UV_WARN_LIMIT
Table 42. Bit Descriptions for VAUX_UV_WARN_LIMIT
Bits Bit Name Settings Description Reset Access
[15:12] RESERVED Always reads as 0000. 0x0 R
[11:0] VAUX_UV_WARN_LIMIT Undervoltage threshold for the ADC_AUX pin measurement,
expressed in ADC codes.
0x0 RW
VAUX STATUS REGISTER
Address: 0xF6, Reset: 0x00, Name: STATUS_VAUX
Table 43. Bit Descriptions for STATUS_VAUX
Bits Bit Name Settings Description Reset Access
7 VAUX_OV_WARN Latched register. 0x0 R
0 No overvoltage condition was detected on the ADC_AUX pin by the
power monitor using the VAUX_OV_WARN_LIMIT command.
1 An overvoltage condition was detected on the ADC_AUX pin by the
power monitor using the VAUX_OV_WARN_LIMIT command.
6 VAUX_UV_WARN Latched register. 0x0 R
0 No undervoltage condition was detected on the ADC_AUX pin by
the power monitor using the VAUX_UV_WARN_LIMIT command.
1 An undervoltage condition was detected on the ADC_AUX pin by
the power monitor using the VAUX_UV_WARN_LIMIT command.
[5:0] RESERVED Always reads as 000000. 0x0 R