Datasheet

Data Sheet ADM1075
Rev. B | Page 39 of 52
REGISTER DETAILS
OPERATION COMMAND REGISTER
Address: 0x01, Reset: 0x00, Name: OPERATION
Table 9. Bit Descriptions for OPERATION
Bits Bit Name Settings Description Reset Access
7 ON Hot swap enable. 0x0 RW
0 Hot swap output disabled.
1 Hot swap output enabled.
[6:0] RESERVED Always reads as 0000000. 0x0 R
CLEAR FAULTS REGISTER
Address: 0x03, Send Byte, No Data, Name: CLEAR_FAULTS
PMBUS CAPABILITY REGISTER
Address: 0x19, Reset: 0xB0, Name: CAPABILITY
Table 10. Bit Descriptions for CAPABILITY
Bits Bit Name Settings Description Reset Access
7 PEC_SUPPORT Always reads as 1. Packet error checking (PEC) is supported. 0x1 R
[6:5] MAX_BUS_SPEED Always reads as 01. Maximum supported bus speed is 400 kHz. 0x01 R
4 SMBALERT_SUPPORT Always reads as 1. Device supports SMBAlert and alert response
address (ARA).
0x1 R
[3:0] RESERVED Always reads as 0000. 0x0000 R
IOUT OC WARN LIMIT REGISTER
Address: 0x4A, Reset: 0x0FFF, Name: IOUT_OC_WARN_LIMIT
Table 11. Bit Descriptions for IOUT_OC_WARN_LIMIT
Bits Bit Name Settings Description Reset Access
[15:12] RESERVED Always reads as 0000. 0x0 R
[11:0] IOUT_OC_WARN_LIMIT Overcurrent threshold for the IOUT measurement through the sense
resistor, expressed in ADC codes.
0xFFF RW
VIN OV WARN LIMIT REGISTER
Address: 0x57, Reset: 0x0FFF, Name: VIN_OV_WARN_LIMIT
Table 12. Bit Descriptions for VIN_OV_WARN_LIMIT
Bits
Bit Name
Settings
Description
Reset
Access
[15:12] RESERVED Always reads as 0000. 0x0 R
[11:0] VIN_OV_WARN_LIMIT Overvoltage threshold for the ADC_V pin measurement, expressed
in ADC codes.
0xFFF RW
VIN UV WARN LIMIT REGISTER
Address: 0x58, Reset: 0x0000, Name: VIN_UV_WARN_LIMIT
Table 13. Bit Descriptions for VIN_UV_WARN_LIMIT
Bits Bit Name Settings Description Reset Access
[15:12] RESERVED Always reads as 0000. 0x0 R
[11:0]
VIN_UV_WARN_LIMIT
Undervoltage threshold for the ADC_V pin measurement, expressed
in ADC codes.
0x0
RW