Datasheet
ADM1066
Rev. E | Page 6 of 32
Parameter Min Typ Max Unit Test Conditions/Comments
Conversion Time 0.44 ms One conversion on one channel
84 ms All 12 channels selected, 16× averaging enabled
Offset Error ±2 LSB V
REFIN
= 2.048 V
Input Noise 0.25 LSB
rms
Direct input (no attenuator)
AUX1, AUX2 Input Impedance 1 MΩ
BUFFERED VOLTAGE OUTPUT DACs
Resolution 8 Bits
Code 0x7F Output Voltage
Six DACs are individually selectable for centering on one of four
output voltage ranges
Range 1 0.592 0.6 0.603 V
Range 2 0.796 0.8 0.803 V
Range 3 0.996 1 1.003 V
Range 4 1.246 1.25 1.253 V
Output Voltage Range 601.25 mV Same range, independent of center point
LSB Step Size 2.36 mV
INL ±0.75 LSB Endpoint corrected
DNL ±0.4 LSB
Gain Error 1 %
Maximum Load Current (Source) 100 μA
Maximum Load Current (Sink) 100 μA
Maximum Load Capacitance 50 pF
Settling Time to 50 pF Load 2 μs
Load Regulation 2.5 mV Per mA
PSRR 60 dB DC
40 dB 100 mV step in 20 ns with 50 pF load
REFERENCE OUTPUT
Reference Output Voltage 2.043 2.048 2.053 V No load
Load Regulation −0.25 mV Sourcing current, I
DACxMAX
= −100 μA
0.25 mV Sinking current, I
DACxMAX
= 100 μA
Minimum Load Capacitance 1 μF Capacitor required for decoupling, stability
PSRR 60 dB DC
PROGRAMMABLE DRIVER OUTPUTS
High Voltage (Charge-Pump)
Mode (PDO1 to PDO6)
Output Impedance 500 kΩ
V
OH
11 12.5 14 V I
OH
= 0 μA
V
OH
10.5 12 13.5 V I
OH
= 1 μA
V
OH
2
8 10 13.5 V I
OH
= 7 μA
I
OUTAVG
20 μA 2 V < V
OH
< 7 V
Standard (Digital Output) Mode
(PDO1 to PDO10)
V
OH
2.4 V V
PU
(pull-up to VDDCAP or VPx) = 2.7 V, I
OH
= 0.5 mA
4.5 V V
PU
to VPx = 6.0 V, I
OH
= 0 mA
V
PU
− 0.3 V V
PU
≤ 2.7 V, I
OH
= 0.5 mA
V
OL
0 0.50 V I
OL
= 20 mA
I
OL
2
20 mA Maximum sink current per PDOx pin
I
SINK
2
60 mA Maximum total sink for all PDOx pins
R
PULL-UP
16 20 29 kΩ Internal pull-up
I
SOURCE
(VPx)
2
2 mA
Current load on any VPx pull-ups, that is, total source current
available through any number of PDO pull-up switches
configured onto any one VPx pin
Three-State Output Leakage
Current
10 μA V
PDO
= 14.4 V
Oscillator Frequency 90 100 110 kHz All on-chip time delays derived from this clock