Datasheet

ADM1064
Rev. D | Page 3 of 32
The logical core of the device is a sequencing engine (SE). This
state machine-based construction provides up to 63 different states.
This design enables very flexible sequencing of the outputs, based
on the condition of the inputs.
The device is controlled via configuration data that can be
programmed into an EEPROM. The entire configuration can
be programmed using an intuitive GUI-based software package
provided by Analog Devices, Inc.
DETAILED BLOCK DIAGRAM
04633-002
GPI SIGNAL
CONDITIONING
SFD
GPI SIGNAL
CONDITIONING
SFD
SFD
SFD
SELECTABLE
ATTENUATOR
SELECTABLE
ATTENUATOR
DEVICE
CONTROLLER
OSC
EEPROM
SDA SCL A1 A0
SMBus
INTERFACE
REFOUTREFIN
AUX1AUX2 REFGND
VREF
12-BIT
SAR ADC
ADM1064
CONFIGURABLE
OUTPUT DRIVER
(HV)
PDO1
PDO2
PDOGND
PDO3
GND
PDO4
PDO5
PDO8
PDO9
CONFIGURABLE
OUTPUT DRIVER
(HV)
PDO6
CONFIGURABLE
OUTPUT DRIVER
(LV)
PDO7
CONFIGURABLE
OUTPUT DRIVER
(LV)
PDO10
SEQUENCING
ENGINE
VX2
VX3
VX4
VP2
VP3
VP4
VH
VP1
VX1
AGND
VX5
VDD
ARBITRATOR
REG 5.25V
CHARGE PUMP
VDDCAP
VCCP
Figure 2. Detailed Block Diagram