Datasheet

REV. A
ADM101E
–3–
PIN FUNCTION DESCRIPTIONS
Pin
No. Mnemonic Function
1 GND Ground Pin. Must be connected to 0 V.
2 C1– Negative Terminal of C1 (if C1 is Polarized
Capacitor).
3 V Internally Generated Negative Supply Voltage.
4T
IN
Driver Input (3 V to 5 V TTL/CMOS
Logic Levels).
5R
OUT
Receiver Output (3 V to 5 V TTL/CMOS
Logic Levels).
6R
IN
Receiver Input (EIA-232 Signal Levels).
7T
OUT
Driver Output (EIA-232 Signal Levels).
8 SD Shutdown Input. Logic 1 on this input puts
the ADM101E into low power shutdown mode.
9 C1+ Positive Terminal of Charge Pump Capacitor
(if C1 is Polarized Capacitor).
10 V
CC
Positive Power Supply, Nominally 5 V.
PIN CONFIGURATION
GND
V SD
T
IN
1
2
3
4
10
9
8
7
ADM101E
TOP VIEW
(Not to Scale)
C1 C1+
T
OUT
5
6
R
OUT
R
IN
V
CC
Typical Performance Characteristics
CURRENT mA
0
1
6
0
255
CHARGE PUMP VOLTAGE Volts
10 15 20
2
3
4
5
TPC 1. Charge Pump Voltage vs. Current
LOAD CAPACITANCE pF
14
12
0
0 3500500
I
DD
mA
1000 1500 2000
10
8
6
4
2500 3000
2
TPC 2. I
DD
vs. Load Capacitance @ 460 kbps