Datasheet

ADL5315
Rev. 0 | Page 5 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC = NO CONNECT
1INPT
2VSET
3SREF
4COMM
8 IOUT
7NC
6 VPOS
5 RLIM
TOP VIEW
(Not to Scale)
ADL5315
05694-002
Figure 2. 8-Lead LFCSP
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 INPT Input Current. Pin sources current only.
2 VSET
Sets Voltage at INPT (Gain = 1). Range 0 V to V
POS
− 1.0 V for V
POS
< 6.5 V. For V
POS
≥ 6.5 V range, V
POS
− 6.5 V to
V
POS
− 1 V. Optional shielding of INPT trace.
3 SREF
Reference Voltage for VSET. Internally generated at V
POS
− 1.0 V through 20 kΩ. Can be shorted to VSET for
standard mirror operation.
4 COMM Analog Ground.
5 RLIM External Resistor to VPOS. Sets current limit at INPT from 1 mA to 16 mA. I
LIM
= 48 V/(R
LIM
+ 3 kΩ).
6 VPOS Positive Supply (2.7 V to 8.0 V).
7 N/C Optional Shielding of IOUT Trace. No connection to die.
8 IOUT Output Current. Mirrors current at INPT with a gain of 1.0. Sources current only.
PADDLE Internally connected to COMM, solder to ground.