Datasheet

ManualsBrandsANALOG DEVICES ManualsInterface ICsInterface IC - analogue switches MSOP 10

0.5 Ω CMOS, Dual

2:1 MUX/SPDT Audio Switch

Data Sheet

ADG884

Rev. D

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700 www.analog.com

FEATURES

1.8 V to 5.5 V operation

Ultralow on resistance

0.28 Ω typical at 5 V supply

0.41 Ω maximum at 5 V supply

Excellent audio performance, ultralow distortion

0.1 Ω typical

0.15 Ω maximum R

flatness

High current carrying capability

400 mA continuous

600 mA peak current at 5 V supply

Rail-to-rail switching operation

Typical power consumption (<0.1 μW)

APPLICATIONS

Cellular phones

PDAs

MP3 players

Power routing

Battery-powered systems

PCMCIA cards

Modems

Audio and video signal routing

Communications systems

FUNCTIONAL BLOCK DIAGRAM

05028-001

IN2

ADG884

NOTES:

1. SWITCHES SHOWN FOR A LOGIC 1 INPUT.

IN1

Figure 1.

GENERAL DESCRIPTION

The ADG884 is a low voltage CMOS device containing two

independently selectable single-pole, double-throw (SPDT)

switches. This device offers ultralow on resistance of 0.41 Ω

over the full temperature range, making the part an ideal

solution for applications that require minimal distortion

through the switch. The ADG884 also has the capability of

carrying large amounts of current, typically 600 mA at 5 V

operation.

The ADG884 is available in a 10-ball, 2 mm × 1.5 mm WLCSP

package, a 10-lead LFCSP_WD package, and a 10-lead MSOP

package. These tiny packages make the ADG884 the ideal

solution for space-constrained applications.

When on, each switch conducts equally well in both directions

and has an input signal range that extends to the supplies. The

ADG884 exhibits break-before-make switching action.

PRODUCT HIGHLIGHTS

1. Single 1.8 V to 5.5 V operation.

2. High current handling capability (400 mA continuous

current).

3. 1.8 V logic compatible.

4. Low THD + N (0.01% typical).

5. Tiny 2 mm × 1.5 mm WLCSP, 3 mm × 3 mm 10-lead

LFCSP_WD, and 10-lead MSOP packages.

Summary of content (16 pages)

PAGE 1
0.5 Ω CMOS, Dual 2:1 MUX/SPDT Audio Switch ADG884 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM 1.8 V to 5.5 V operation Ultralow on resistance 0.28 Ω typical at 5 V supply 0.41 Ω maximum at 5 V supply Excellent audio performance, ultralow distortion 0.1 Ω typical 0.15 Ω maximum RON flatness High current carrying capability 400 mA continuous 600 mA peak current at 5 V supply Rail-to-rail switching operation Typical power consumption (<0.1 μW) ADG884 S1A D1 S1B IN1 IN2 S2A D2 NOTES: 1.
PAGE 2
ADG884 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................6 Applications....................................................................................... 1 Pin Configurations and Function Descriptions ............................7 Functional Block Diagram ..............................................................
PAGE 3
Data Sheet ADG884 SPECIFICATIONS VDD = 5 V ± 10%, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On-Resistance Match Between Channels, ∆RON On-Resistance Flatness, RFLAT (On) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 25°C 0.28 0.37 0.01 0.035 0.1 0.
PAGE 4
ADG884 Data Sheet VDD = 3.4 V to 4.2 V; GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On-Resistance Match Between Channels, ∆RON On-Resistance Flatness, RFLAT (On) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 25°C 0.33 0.4 0.013 0.042 0.13 0.
PAGE 5
Data Sheet ADG884 VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted. Table 3. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON 25°C On-Resistance Match Between Channels, ∆RON 0.4 0.51 0.02 On-Resistance Flatness, RFLAT (On) 0.07 0.18 −40°C to +85°C Unit Test Conditions/Comments 0 to VDD V Ω typ Ω max Ω typ VDD = 2.7 V, VS = 0 V to VDD IS = 100 mA; see Figure 18 VDD = 2.7 V, VS = 0.6 V 0.61 0.1 0.
PAGE 6
ADG884 Data Sheet ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 4. Parameter VDD to GND Analog Inputs, 1 Digital Inputs Peak Current, S or D Continuous Current, S or D Operating Temperature Range Storage Temperature Range Junction Temperature 10-Lead MSOP, Thermal Impedance θJA θJC 10-Ball WLCSP (4-Layer Board), Thermal Impedance θJA 10-Lead LFCSP_WD (4-Layer Board), Thermal Impedance θJA θJC Reflow Soldering (Pb-Free) Peak Temperature Time at Peak Temperature 1 Rating −0.
PAGE 7
Data Sheet ADG884 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS ADG884 9 D2 TOP VIEW (Not to Scale) 8 IN2 7 S2B 6 GND D1 3 IN1 4 S1B 5 NOTES 1. THE LFCSP_WD PACKAGE HAS AN EXPOSED PAD THAT SHOULD BE TIED TO GROUND. A 2 3 GND S2B 1 2 IN1 B C D 3 IN2 4 ADG884 TOP VIEW D1 (Not to Scale) D2 5 9 10 S1A VDD S2A 8 7 6 (SOLDER BALLS ON OPPOSITE SIDE) Figure 2. LFCSP_WD and MSOP Pin Configuration 05028-028 10 S2A 05028-002 VDD 1 S1A 2 1 S1B Figure 3.
PAGE 8
ADG884 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 0.30 0.45 TA = 25°C IDS = 100mA VDD = 3.3V IDS = 100mA 0.40 0.25 0.35 ON RESISTANCE (Ω) ON RESISTANCE (Ω) 4.5V 4.2V 0.20 5.5V 0.15 5V 0.10 +85°C 0.30 +25°C 0.25 –40°C 0.20 0.15 0.10 0 1 2 3 SIGNAL RANGE (V) 4 0 5 Figure 4. On Resistance vs. VD (VS), VDD = 4.2 V to 5.5 V 1.0 1.5 2.0 SIGNAL RANGE (V) 2.5 3.0 3 2.7V 0.30 3V 0.25 3.3V 0.20 VDD = 5V 4 LEAKAGE CURRENT (nA) 0.15 0.
PAGE 9
Data Sheet ADG884 4.0 0 VDD = 3.3V 3.5 –1 TA = 25°C VDD = 5V/4.2V/3V –2 2.5 ATTENUATION (dB) LEAKAGE CURRENT (nA) 3.0 2.0 1.5 ID, IS (ON) 1.0 0.5 –3 –4 –5 –6 0 IS (OFF) 0 10 20 30 40 50 60 TEMPERATURE (°C) 70 –8 0.03 80 Figure 10. Leakage Current vs. Temperature, VDD = 3.3 V 05028-022 –1.0 –7 05028-026 –0.5 0.10 1.00 10.00 FREQUENCY (MHz) 100.00 Figure 13. Bandwidth, VDD = 5 V/4.2 V/3 V 600 0 TA = 25°C 500 –10 VDD = 5V TA = 25°C VDD = 5V/4.
PAGE 10
ADG884 Data Sheet 0.10 0 –20 TA = 25°C VDD = 5V/4.2V/3V 0.09 0.08 0.07 –80 –100 0.06 0.05 0.04 VDD = 3V, 1.5V p-p 0.03 –120 VDD = 5V, 3.5V p-p 0.02 –140 –160 10 100 1k 10k 100k 1M FREQUENCY (MHz) 10M 100M Figure 16. AC PSRR 0.01 0 VDD = 4.2V, 2V p-p 0 10 20 30 40 50 60 70 FREQUENCY (kHz) Figure 17. THD + N Rev.
PAGE 11
Data Sheet ADG884 TEST CIRCUITS IDS V1 S RON = V1/IDS 05028-012 VS D Figure 18. On Resistance IS (OFF) A S D ID (OFF) A VD 05028-013 VS Figure 19. Off Leakage D ID (ON) A VD 05028-014 S NC Figure 20. On Leakage VDD 0.1µF VDD VS VOUT D RL 50Ω IN 50% VIN 50% CL 35pF 90% VOUT 90% GND tON tOFF 05028-015 S1B S1A Figure 21. Switching Times, tON, tOFF VDD 0.
PAGE 12
ADG884 Data Sheet VDD SW OFF SW ON D VS VIN S1B NC S1A VOUT 1nF IN VOUT ∆VOUT GND 05028-017 QINJ = CL × ∆VOUT Figure 23. Charge Injection VDD 0.1µF 0.1µF NETWORK ANALYZER VDD S1A 50Ω 50Ω NETWORK ANALYZER VDD S1B VS 50Ω S1A VS D RL 50Ω GND OFF ISOLATION = 20 LOG VOUT RL 50Ω GND VOUT INSERTION LOSS = 20 LOG VS Figure 24. Off Isolation VOUT 05028-019 D 05028-018 S1B NC VDD VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 26. Bandwidth VDD 0.
PAGE 13
Data Sheet ADG884 TERMINOLOGY IDD Positive supply current. CD, CS (On) On switch capacitance. Measured with reference to ground. VD (VS) Analog voltage on Terminal D and Terminal S. CIN RON tON Delay time between the 50% and 90% points of the digital input and switch on condition. Digital input capacitance. Ohmic resistance between Terminal D and Terminal S. RFLAT (On) The difference between the maximum and minimum values of on resistance as measured on the switch.
PAGE 14
ADG884 Data Sheet OUTLINE DIMENSIONS 0.30 0.23 0.18 3.00 BSC SQ 0.50 BSC 10 6 PIN 1 INDEX AREA 1.74 1.64 1.49 EXPOSED PAD (BOTTOM VIEW) 0.50 0.40 0.30 5 TOP VIEW 2.48 2.38 2.23 0.80 MAX 0.55 NOM 0.80 0.75 0.70 1 PIN 1 INDICATOR (R 0.20) 0.05 MAX 0.02 NOM SEATING PLANE 031208-B 0.20 REF Figure 28. 10-Lead Lead Frame Chip Scale Package [LFCSP_WD] 3 mm x 3 mm Body, Very Very Thin, Dual Lead (CP-10-9) Dimensions shown in millimeters 3.10 3.00 2.90 10 3.10 3.00 2.90 1 6 5 5.15 4.90 4.
PAGE 15
Data Sheet ADG884 0.63 0.57 0.51 SEATING PLANE 1.56 1.50 1.44 3 2 A 0.36 0.32 0.28 BALL 1 IDENTIFIER 1 2.06 2.00 1.94 B 0.50 BSC BALL PITCH C D (BALL SIDE DOWN) 0.11 0.09 0.07 BOTTOM VIEW (BALL SIDE UP) 081607-A 0.26 0.22 0.18 TOP VIEW Figure 30.