Datasheet

ADG794
Rev. B | Page 6 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
S1A
S1B
D1
D2
S2B
S2A
IN
EN
S4A
S4B
S3B
GND D3
S3A
D4
V
DD
TOP VIEW
(Not to Scale)
ADG794
05150-002
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin N0. Mnemonic Description
1 IN Logic Control Input. The logic level at this input controls the operation of the multiplexers (see Table 4).
2 S1A A-Side Source Terminal of Mux1. Can be an input or an output.
3 S1B B-Side Source Terminal of Mux1. Can be an input or an output.
4 D1 Drain Terminal of Mux1. Can be an input or an output.
5 S2A A-Side Source Terminal of Mux2. Can be an input or an output.
6 S2B B-Side Source Terminal of Mux2. Can be an input or an output.
7 D2 Drain Terminal of Mux2. Can be an input or an output.
8 GND Ground Reference.
9 D3 Drain Terminal of Mux3. Can be an input or an output.
10 S3B B-Side Source Terminal of Mux3. Can be an input or an output.
11 S3A A-Side Source Terminal of Mux3. Can be an input or an output.
12 D4 Drain Terminal of Mux4. Can be an input or an output.
13 S4B B-Side Source Terminal of Mux4. Can be an input or an output.
14 S4A A-Side Source Terminal of Mux4. Can be an input or an output.
15
EN
Mux Enable Logic Input. Enables or disables the multiplexers (see Table 4).
16 V
DD
Positive Power Supply Voltage.