Datasheet

REV.
ADG786/ADG788
–10–
* IN1–4 for ADG734
GND
V
DD
ADG786/
ADG788
V
OUT
C
L
1nF
V
S
R
S
D
S
V
DD
V
SS
V
SS
V
IN
EN*
V
OUT
3V
V
OUT
LOGIC
INPUT (V
IN
)
Q
INJ
= C
L
 V
OUT
0V
Test Circuit 7. Charge Injection
V
S
V
OUT
50
NETWORK
ANALYZER
R
L
50
IN
GND
V
IN
S
D
50
OFF ISOLATION = 20 LOG
V
OUT
V
S
V
DD
0.1F
V
DD
V
SS
0.1F
V
SS
Test Circuit 8. OFF Isolation
CHANNEL-TO-CHANNEL
CROSSTALK = 20 LOG
GND
V
DD
0.1F
V
DD
V
SS
0.1F
V
SS
SA
D
SB
V
S
V
OUT
NETWORK
ANALYZER
R
L
50
IN
V
OUT
V
S
50
R
50
Test Circuit 9. Channel-to-Channel Crosstalk
Power Supply Sequencing
When using CMOS devices, care must be taken to ensure cor-
rect power supply sequencing. Incorrect sequencing can result
in the device being subjected to stresses beyond those maximum
ratings listed in the data sheet. Digital and analog inputs should
be applied to the device after supplies and ground. In dual sup-
ply applications, if digital and analog inputs may be applied
prior to V
DD
and V
SS
supplies, the addition of a Schottky diode
connected between V
SS
and GND will ensure that the device
powers on correctly. For single supply applications, V
SS
should
be tied to GND as close to the device as possible.
V
S
V
OUT
50
NETWORK
ANALYZER
R
L
50
IN
GND
V
IN
S
D
INSERTION LOSS = 20 LOG
V
OUT
WITH SWITCH
V
OUT
WITHOUT SWITCH
V
DD
0.1F
V
DD
V
SS
0.1F
V
SS
Test Circuit 10. Bandwidth
B