Datasheet

ADG774
–5–
REV. C
PIN CONFIGURATION
(SOIC/QSOP)
TOP VIEW
(Not to Scale)
1
3
2
4
5
6
7
8
IN
S1A
S1B
D1
S2A
S2B
D2
GND
V
DD
EN
S4A
S4B
D4
S3A
S3B
D3
ADG774
16
14
15
13
12
11
10
9
TERMINOLOGY
V
DD
Most Positive Power Supply Potential.
GND Ground (0 V) Reference.
S Source Terminal. May be an input or output.
DDrain Terminal. May be an input or output.
IN Logic Control Input.
EN Logic Control Input.
R
ON
Ohmic Resistance between D and S.
R
ON
On Resistance Match between any Two Channels, i.e., R
ON
max – R
ON
min.
R
FLAT(ON)
Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over
the specified analog signal range.
I
S
(OFF) Source Leakage Current with the Switch OFF.
I
D
(OFF) Drain Leakage Current with the Switch OFF.
I
D
, I
S
(ON) Channel Leakage Current with the Switch ON.
V
D
(V
S
)Analog Voltage on Terminals D, S.
C
S
(OFF) OFF Switch Source Capacitance.
C
D
(OFF) OFF Switch Drain Capacitance.
C
D
, C
S
(ON) ON Switch Capacitance.
t
ON
Delay between Applying the Digital Control Input and the Output Switching on. See Test Circuit 4.
t
OFF
Delay between Applying the Digital Control Input and the Output Switching Off.
t
D
OFF Time or ON Time Measured between the 90% Points of Both Switches, When Switching from One Address
State to Another. See Test Circuit 5.
Crosstalk A Measure of Unwanted Signal that is Coupled through from One Channel to Another as a Result of Parasitic
Capacitance.
Off Isolation A Measure of Unwanted Signal Coupling through an OFF Switch.
Bandwidth Frequency Response of the Switch in the ON State Measured at 3 dB Down.
Distortion R
FLAT(ON)
/R
L