Datasheet

Data Sheet ADG772
Rev. B | Page 9 of 12
TEST CIRCUITS
SD
V
S
R
ON
= V1/I
DS
I
DS
V1
06692-004
Figure 21. On Resistance
V
S
V
D
I
S
(OFF) I
D
(OFF)
A A
0
6692-005
SD
Figure 22. Off Leakage
V
D
I
D
(ON)
NC
A
06692-006
SD
Figure 23. On Leakage
D
IN
GND
R
L
50Ω
C
L
35pF
V
DD
V
IN
V
OUT
V
S
V
DD
V
OUT
t
ON
t
OFF
50% 50%
90% 90%
0.1µF
S1B
S1A
06692-007
Figure 24. Switching Times, t
ON
, t
OFF
V
OUT
V
IN
t
BBM
t
BBM
50% 50%
80%
0V
D
IN
GND
R
L
50Ω
C
L
35pF
V
DD
V
OUT
V
S
V
DD
0.1µF
S1B
S1A
80%
06692-008
Figure 25. Break-Before-Make Time Delay, t
BBM
IN
GND
V
DD
V
S
V
IN
V
OUT
1nF
V
OUT
NC
SWITCH ON
Q
INJ
= C
L
× ∆V
OUT
SWITCH OFF
∆V
OUT
S1B
S1A
D
06692-009
Figure 26. Charge Injection