Datasheet

ManualsBrandsANALOG DEVICES ManualsInterface ICsInterface IC - multiplexers, demultiplexers LFCSP 10 UQ

CMOS Low Power Dual 2:1 Mux/Demux

USB 2.0 (480 Mbps)/USB 1.1 (12 Mbps)

Data Sheet

ADG772

Rev. B Document Feedback

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FEATURES

USB 2.0 (480 Mbps) and USB 1.1 (12 Mbps) signal

switching compliant

Tiny 10-lead 1.6 mm × 1.3 mm mini LFCSP package

and 12-lead 3 mm × 3 mm LFCSP package

2.7 V to 3.6 V single-supply operation

Typical power consumption: <0.1 μW

RoHS compliant

APPLICATIONS

USB 2.0 signal switching circuits

Cellular phones

PDAs

MP3 players

Battery-powered systems

Headphone switching

Audio and video signal routing

Communications systems

FUNCTIONAL BLOCK DIAGRAM

S1A

S1B

S2A

S2B

IN2

ADG772

SWITCHES SHOWN FOR A LOGIC 0 INPUT

IN1

06692-001

Figure 1.

GENERAL DESCRIPTION

The ADG772 is a low voltage CMOS device that contains two

independently selectable single-pole, double throw (SPDT)

switches. It is designed as a general-purpose switch and can be

used for routing both USB 1.1 and USB 2.0 signals.

This device offers a data rate of 1260 Mbps, making the part

suitable for high frequency data switching. Each switch con-

ducts equally well in both directions when on and has an input

signal range that extends to the supplies. The ADG772 exhibits

break-before-make switching action.

The ADG772 is available in a 12-lead LFCSP and a 10-lead mini

LFCSP. These packages make the ADG772 the ideal solution for

space-constrained applications.

PRODUCT HIGHLIGHTS

1. 1.6 mm × 1.3 mm mini LFCSP package.

2. USB 1.1 (12 Mbps) and USB 2.0 (480 Mbps) compliant.

3. Single 2.7 V to 3.6 V operation.

4. 1.8 V logic compatible.

5. RoHS compliant.

Summary of content (12 pages)

PAGE 1
CMOS Low Power Dual 2:1 Mux/Demux USB 2.0 (480 Mbps)/USB 1.1 (12 Mbps) ADG772 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM USB 2.0 (480 Mbps) and USB 1.1 (12 Mbps) signal switching compliant Tiny 10-lead 1.6 mm × 1.3 mm mini LFCSP package and 12-lead 3 mm × 3 mm LFCSP package 2.7 V to 3.6 V single-supply operation Typical power consumption: <0.1 μW RoHS compliant ADG772 S1A D1 S1B IN1 IN2 S2A APPLICATIONS D2 USB 2.
PAGE 2
ADG772 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................4 Applications ....................................................................................... 1 Pin Configuration and Function Descriptions..............................5 Functional Block Diagram ..............................................................
PAGE 3
Data Sheet ADG772 SPECIFICATIONS VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On-Resistance (RON) +25°C −40°C to +85°C Unit 0 V to VDD V Ω typ Ω max Ω typ Ω max Ω typ Ω max 6.7 8.8 On-Resistance Match Between Channels (∆RON) On Resistance Flatness (RFLAT (ON)) 0.04 0.2 3.3 3.
PAGE 4
ADG772 Data Sheet ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 2.
PAGE 5
Data Sheet ADG772 9 D2 8 S2B 7 NC 11 GND NOTES 1. NC = NO CONNECT. 2. THE EXPOSED PAD IS CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS AND MAXIMUM THERMAL CAPABILITY, IT IS RECOMMENDED THAT THE PAD BE SOLDERED TO A GROUND REFERENCE.
PAGE 6
ADG772 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 7 7 TA = 25°C 6 6 TA = +25°C VDD = 3.6V ON RESISTANCE (Ω) 4 3 2 5 4 TA = –40°C 3 2 1 0 0 0.5 1.5 1.0 2.0 2.5 VD, VS (V) 3.0 3.5 4.0 06692-024 1 0 0 1.0 1.5 2.0 VD, VS (V) 2.5 3.0 3.5 Figure 7. On Resistance vs. VD, VS for Different Temperatures; VDD = 3.3 V Figure 4. On Resistance vs. VD, VS; VDD = 3.3 V ± 0.3 V 8 10 TA = 25°C VDD = 2.7V 9 VDD = 2.3V 8 VDD = 2.
PAGE 7
Data Sheet ADG772 1.2 2.0 VDD = 3.3V TA = 25°C 1.0 0.8 ID, IS (ON)++ ID, IS (OFF)+– 0.6 VCC = 2.5V 1.0 QINJ (pC) CURRENT (nA) VCC = 3.3V 1.5 0.4 0.5 VCC = 1.8V 0 0.2 –0.5 0 0 10 20 30 40 50 60 TEMPERATURE (°C) 70 80 90 –1 0 2.5 2.0 1.5 1.0 0.5 3.0 3.5 VS (V) Figure 10. Leakage Current vs. Temperature; VDD = 3.3 V 06692-018 ID, IS (OFF)–+ –0.2 06692-028 ID, IS (ON)– – Figure 13. Charge Injection vs. Source Voltage 0.9 12 VDD = 2.5V 0.8 10 0.7 ID, IS (ON)++ 0.
PAGE 8
ADG772 Data Sheet 0 –10 TA = 25°C VDD = 3.3V, 2.5V, 1.8V –20 ATTENUATION (dB) –30 –40 –50 –60 –70 2 –80 10 100 FREQUENCY (MHz) 1000 C2 835mV Ω Figure 16. Off Isolation vs. Frequency Figure 19. USB 1.1 Eye Diagram 0 –10 20.0ns/DIV 2.5GS/s ET 400ps/pt A C1 2.64V 06692-021 1 06692-016 –90 –100 +500mV TA = 25°C VDD = 3.3V, 2.5V, 1.8V 1 –20 CROSSTALK (dB) –30 +100mV/ DIV –40 2 S1A to S1B –50 –60 S1A to S2A –70 –80 10 100 FREQUENCY (MHz) 1 1000 3 –500mV 37.37ns Figure 17.
PAGE 9
Data Sheet ADG772 TEST CIRCUITS IDS A S D ID (OFF) A S NC VS RON = V1/IDS VD A VD 06692-004 Figure 23. On Leakage Figure 22. Off Leakage Figure 21. On Resistance VDD 0.1µF VDD S1B S1A VS VOUT D RL 50Ω IN 50% VIN CL 35pF 50% 90% VOUT 90% tON tOFF 06692-007 GND Figure 24. Switching Times, tON, tOFF 0.1µF VDD VDD S1B S1A VS VIN D VOUT VOUT 80% CL 35pF RL 50Ω IN 50% 0V 50% 80% tBBM tBBM 06692-008 GND Figure 25.
PAGE 10
ADG772 Data Sheet VDD VDD 0.1µF 0.1µF NETWORK ANALYZER VDD S1B S1A 50Ω 50Ω S1B 50Ω S1A VS VS D D RL 50Ω OFF ISOLATION = 20 log VOUT RL 50Ω GND 06692-010 GND VOUT VOUT VS INSERTION LOSS = 20 log 06692-012 NC NETWORK ANALYZER VDD VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 29. Channel-to-Channel Crosstalk (S1A to S1B) Figure 27. Off Isolation VDD 0.
PAGE 11
Data Sheet ADG772 TERMINOLOGY IDD Positive supply current. CIN Digital input capacitance. VD,VS Analog voltage on Terminal D and Terminal S. tON Delay time between the 50% and 90% points of the digital input and switch on condition. RON Ohmic resistance between Terminal D and Terminal S. RFLAT (On) The difference between the maximum and minimum values of on resistance as measured on the switch. ∆RON On resistance match between any two channels. IS (Off) Source leakage current with the switch off.
PAGE 12
ADG772 Data Sheet OUTLINE DIMENSIONS 0.20 DIA TYP 0.55 0.40 0.30 1.30 PIN 1 IDENTIFIER 9 1 1.60 0.40 BSC 4 BOTTOM VIEW TOP VIEW 0.60 0.55 0.50 6 0.35 0.30 0.25 0.05 MAX 0.02 NOM 033007-A 0.20 BSC SEATING PLANE Figure 31. 10-Lead Mini Lead Frame Chip Scale Package [LFCSP_UQ] 1.30 mm × 1.60 mm Body, Ultra Thin Quad (CP-10-10) Dimensions shown in millimeters 3.15 3.00 SQ 2.85 0.60 MAX 0.50 BSC 0.60 MAX 10 9 2.95 2.75 SQ 2.55 1 0.75 0.60 0.50 EXPOSED PAD TOP VIEW 1.00 0.85 0.