Datasheet

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CMOS, Low Voltage, 4 Ω Dual SPST

Switches in 3 mm × 2 mm LFCSP

Data Sheet

ADG721/ADG722/ADG723

Rev. E

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FEATURES

1.8 V to 5.5 V single supply

4 Ω (max) on resistance

Low on resistance flatness

−3 dB bandwidth >200 MHz

Tiny package options

8-lead MSOP

3 mm × 2 mm LFCSP (A grade)

Fast switching times

, 20 ns

OFF

, 10 ns

Low power consumption (<0.1 μW)

TTL/CMOS compatible

APPLICATIONS

USB 1.1 signal switching circuits

Cell phones

PDAs

Battery-powered systems

Communication systems

Sample hold systems

Audio signal routing

Video switching

Mechanical reed relay replacement

FUNCTIONAL BLOCK DIAGRAMS

ADG721

IN1

IN2

00045-001

ADG722

IN1

IN2

00045-002

Figure 1. Figure 2.

ADG723

SWITCHES SHOWN FOR

A LOGIC "0" INPUT

IN1

IN2

00045-003

Figure 3.

GENERAL DESCRIPTION

The ADG721, ADG722, and ADG723 are monolithic CMOS

SPST switches. These switches are designed on an advanced

submicron process that provides low power dissipation yet gives

high switching speed, low on resistance, and low leakage

currents. The devices are packaged in both a tiny 3 mm × 2 mm

LFCSP and an MSOP, making them ideal for space-constrained

applications.

The ADG721, ADG722, and ADG723 are designed to operate

from a single 1.8 V to 5.5 V supply, making them ideal for use

in battery-powered instruments and with the new generation of

DACs and ADCs from Analog Devices, Inc.

The ADG721, ADG722, and ADG723 contain two independent

single-pole/single-throw (SPST) switches. The ADG721 and

ADG722 differ only in that both switches are normally open

and normally closed, respectively. In the ADG723, Switch 1 is

normally open and Switch 2 is normally closed.

Each switch of the ADG721, ADG722, and ADG723 conducts

equally well in both directions when on. The ADG723 exhibits

break-before-make switching action.

PRODUCT HIGHLIGHTS

1. 1.8 V to 5.5 V single-supply operation.

2. Ver y low R

(4 Ω max at 5 V, 10 Ω max at 3 V).

3. Low on resistance flatness.

4. −3 dB bandwidth >200 MHz.

5. Low power dissipation. CMOS construction ensures low

power dissipation.

6. 8-lead MSOP and 3 mm × 2 mm LFCSP.

Summary of content (16 pages)

PAGE 1
.8 V to 5.5 V single supply 4 Ω (max) on resistance Low on resistance flatness −3 dB bandwidth >200 MHz Tiny package options 8-lead MSOP 3 mm × 2 mm LFCSP (A grade) Fast switching times tON, 20 ns tOFF, 10 ns Low power consumption (<0.1 μW) TTL/CMOS compatible FUNCTIONAL BLOCK DIAGRAMS ADG722 ADG721 S1 S1 IN1 IN1 D1 D1 D2 D2 IN2 IN2 S2 S2 Figure 1. 00045-002 FEATURES 00045-001 Data Sheet CMOS, Low Voltage, 4 Ω Dual SPST Switches in 3 mm × 2 mm LFCSP ADG721/ADG722/ADG723 Figure 2.
PAGE 2
ADG721/ADG722/ADG723 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Terminology .......................................................................................7 Applications ....................................................................................... 1 Typical Performance Characteristics ..............................................8 Functional Block Diagrams ....................................
PAGE 3
Data Sheet ADG721/ADG722/ADG723 SPECIFICATIONS VDD = 5 V ± 10%, GND = 0 V. All specifications −40°C to +85°C, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON A, B Grade 1 +25°C −40°C to +85°C 0 to VDD On Resistance Match Between Channels, ∆RON 2.5 4 0.3 On Resistance Flatness, RFLAT(ON) 0.85 5 1.0 1.
PAGE 4
ADG721/ADG722/ADG723 Data Sheet VDD = 3 V ± 10%, GND = 0 V. All specifications −40°C to +85°C, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON A, B Grades 1 +25°C −40°C to +85°C 0 to VDD 3.5 V Ω typ Ω max Ω typ Ω max Ω typ ±0.01 ±0.01 ±0.01 nA typ nA typ nA typ 6.5 10 On Resistance Match Between Channels, ∆RON 0.3 1.
PAGE 5
Data Sheet ADG721/ADG722/ADG723 ABSOLUTE MAXIMUM RATINGS TA = 25°C unless otherwise noted. Table 3.
PAGE 6
ADG721/ADG722/ADG723 Data Sheet PIN CONFIGURATION AND PIN DESCRIPTIONS S1 1 D1 2 IN2 3 ADG721/ ADG722/ ADG723 8 VDD 7 IN1 NOTES 1. EXPOSED PADDLE OF LFCSP SHOULD BE TIED TO GROUND. 00045-004 TOP VIEW 6 D2 GND 4 (Not to Scale) 5 S2 Figure 4. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 Mnemonic S1 D1 IN2 GND S2 D2 IN1 VDD Descriptions Source Pin 1. May be an input or an output. Drain Pin 1. May be an input or an output. Logic Control Input for Switch S2D2.
PAGE 7
Data Sheet ADG721/ADG722/ADG723 TERMINOLOGY VDD Most positive power supply potential. VD (VS) Analog voltage on the D and S terminals. GND Ground (0 V) reference. CS (OFF) Off switch source capacitance. S Source terminal. May be an input or output. CD (OFF) Off switch drain capacitance. D Drain terminal. May be an input or output. CD, CS (ON) On switch capacitance. IN Logic control input. tON Delay between applying the digital control input and the output switching on.
PAGE 8
ADG721/ADG722/ADG723 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 1m 6.0 TA = 25°C 5.5 VDD = 5V VDD = 2.7V 5.0 100µ 4.5 VDD = 4.5V 4.0 10µ RON (Ω) ISUPPLY (A) VDD = 3.0V 3.5 3.0 2.5 VDD = 5.0V 2.0 1µ 100n 1.5 10n 1.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.
PAGE 9
Data Sheet ADG721/ADG722/ADG723 –6 VDD = 5V –8 –9 –10 –11 –12 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M 00045-011 ON RESPONSE (dB) –7 Figure 11. On Response vs. Frequency Rev.
PAGE 10
ADG721/ADG722/ADG723 Data Sheet TEST CIRCUITS IDS V1 RON = V1/IDS D ID (OFF) ID (ON) S A VS VD Figure 12. On Resistance D A VS VD Figure 13. Off Leakage Figure 14. On Leakage VDD 0.1µF VIN ADG721 50% 50% VIN 50% 50% VDD S VS VOUT D CL 35pF RL 300Ω IN ADG722 90% 90% VOUT tON tOFF 00045-015 GND Figure 15. Switching Times VDD 0.
PAGE 11
Data Sheet ADG721/ADG722/ADG723 VDD VDD 0.1µF 0.1µF VDD VDD D S VOUT D RL 50Ω IN VS GND VIN IN GND Figure 19. Channel-to-Channel Crosstalk Figure 18. Off Isolation VDD 0.1µF VDD S VS NC 50Ω D VIN1 VIN2 S D GND CHANNEL-TO-CHANNEL CROSSTALK = 20 × log |VS/VOUT| Figure 20. Bandwidth Rev.
PAGE 12
ADG721/ADG722/ADG723 Data Sheet APPLICATIONS The ADG721/ADG722/ADG723 belong to a new family of Analog Devices CMOS switches. This series of general-purpose switches has improved switching times, lower on resistance, higher bandwidths, low power consumption, and low leakage currents. ADG721/ADG722/ADG723 SUPPLY VOLTAGES Functionality of the ADG721/ADG722/ADG723 extends from a 1.8 V to a 5.
PAGE 13
Data Sheet ADG721/ADG722/ADG723 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 3.20 3.00 2.80 5.15 4.90 4.65 5 1 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 0.85 0.75 15° MAX 1.10 MAX 6° 0° 0.40 0.25 0.80 0.55 0.40 0.23 0.09 10-07-2009-B 0.15 0.05 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 23. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 1.75 1.65 1.50 2.00 BSC 5 3.00 BSC 8 1.90 1.80 1.65 EXPOSED PAD 0.20 MIN 4 INDEX AREA 0.50 0.40 0.
PAGE 14
ADG721/ADG722/ADG723 Data Sheet ORDERING GUIDE Model 1 ADG721BRM ADG721BRM-REEL ADG721BRM-REEL7 ADG721BRMZ ADG721BRMZ-REEL ADG721BRMZ-REEL7 ADG721ACPZ-REEL ADG721ACPZ-REEL7 ADG722BRM ADG722BRM-REEL7 ADG722BRMZ ADG722BRMZ-REEL ADG722BRMZ-REEL7 ADG722ACPZ-REEL ADG722ACPZ-REEL7 ADG723BRM ADG723BRM-REEL ADG723BRM-REEL7 ADG723BRMZ ADG723BRMZ-REEL ADG723BRMZ-REEL7 ADG723ACPZ-REEL ADG723ACPZ-REEL7 1 2 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40
PAGE 15
Data Sheet ADG721/ADG722/ADG723 NOTES Rev.
PAGE 16
ADG721/ADG722/ADG723 Data Sheet NOTES ©2004-2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00045-0-10/11(E) Rev.