Datasheet
ADG714/ADG715 Data Sheet
Rev. E | Page 20 of 21
DECODING MULTIPLE ADG714 DEVICES USING
THE ADG739
Use the dual 4-channel ADG739 multiplexer to multiplex a
single chip select line to provide chip selects for up to four
devices on the SPI bus. Figure 29 illustrates the ADG739 and
multiple ADG714 devices in such a typical configuration. All
devices receive the same serial clock and serial data, but only
one device receives the
SYNC
signal at any one time. The
ADG739 is also a serially controlled device. One bit programmable
pin of the microcontroller is used to enable the ADG739 via
SYNC2
, while another bit programmable pin is used as the chip
select for the other serial devices,
SYNC1
. Driving
SYNC2
low
enables changes to be made to the addressed serial devices. By
bringing
SYNC1
low, the selected serial device hanging from
the SPI bus is enabled, and data is clocked into the shift register
on the falling edges of SCLK. The design of the matrix switch
allows for different combinations of the four serial devices to be
addressed at any one time. If more devices must be addressed
via one chip select line, the
ADG738, an 8-channel device,
allows further expansion of the chip select scheme. Note that
there is digital feedthrough from the digital input lines because
SCLK and DIN are permanently connected to each device.
Using a burst clock minimizes the effects of this digital
feedthrough on the analog channels.
DIN
SCLK
DIN
SCLK
DIN
SCLK
DIN
SCLK
ADG714
ADG714
SCLK
DIN
S1A
S4A
DA
1/2 OF ADG739
SYNC
S3A
S2A
FROM
MICRO-
CONTROLLER
OR DSP
SYNC1
SYNC2
SYNC
SYNC
SYNC
SYNC
SCLK
DIN
V
DD
OTHER SPI
DEVICE
OTHER SPI
DEVICE
R
V
DD
R
R
R
V
DD
V
DD
V
DD
00043-028
Figure 29. Addressing Multiple ADG714 Devices Using an ADG739
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