Datasheet
ADG619-EP
Rev. 0 | Page 10 of 12
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-178-BA
121608-A
8°
4°
0°
SEATING
PLANE
1.95
BSC
0.65 BSC
0.60
BSC
7 6
1 2 3 4
5
3.00
2.90
2.80
3.00
2.80
2.60
1.70
1.60
1.50
1.30
1.15
0.90
0.15 MAX
0.05 MIN
1.45 MAX
0.95 MIN
0.22 MAX
0.08 MIN
0.38 MAX
0.22 MIN
0.60
0.45
0.30
PIN 1
INDICATOR
8
Figure 18. 8-Lead Small Outline Transistor Package [SOT-23]
(RJ-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model
1
Temperature Range Package Description Package Option Branding
2
ADG619SRJZ-EP-RL7 −55°C to +125°C 8-Lead Small Outline Transistor Package [SOT-23] RJ-8 S3V
1
Z =RoHS Compliant Part.
2
Branding on SOT-23 packages is limited to three characters due to space constraints