Datasheet

ManualsBrandsANALOG DEVICES ManualsInterface ICsInterface IC - analogue switches MSOP 8

2 Ω, CMOS, ±5 V/+5 V

SPST Switches

ADG601/ADG602

Rev. C

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700 www.analog.com

FEATURES

Low on resistance, 2.5 Ω maximum

<0.65 Ω on-resistance flatness

Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V supplies

Rail-to-rail input signal range

Tiny, 6-lead SOT-23; 8-lead MSOP; and 820 μm × 2255 μm die

Low power consumption

TTL-/CMOS-compatible inputs

APPLICATIONS

Automatic test equipment

Power routing

Communication systems

Data acquisition systems

Sample-and-hold systems

Avionics

Relay replacement

Battery-powered systems

FUNCTIONAL BLOCK DIAGRAMS

ADG602

ADG601

NOTES

1. SWITCHES SHOWN FOR A LOGIC 0 INPUT.

02619-001

Figure 1.

Table 1. Truth Table

ADG601 IN ADG602 IN Switch Condition

0 1 Off

1 0 On

GENERAL DESCRIPTION

The ADG601/ADG602 are monolithic, CMOS single-pole

single-throw (SPST) switches with on resistance typically less

than 2.5 Ω. The low on-resistance flatness makes the

ADG601/ADG602 ideally suited to many applications,

particularly those requiring low distortion. These switches are

ideal replacements for mechanical relays because they are more

reliable, have lower power requirements, and are available in

much smaller package sizes.

The ADG601 is a normally open (NO) switch, and the ADG602

is a normally closed (NC) switch. Each switch conducts equally

well in both directions when the device is on, with the input

signal range extending to the supply rails.

The switches are available in tiny, 6-lead SOT-23; 8-lead MSOP;

and 820 μm × 2255 μm die.

PRODUCT HIGHLIGHTS

1. Low on resistance (2 Ω typical)

2. Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V supplies

3. Tiny, 6-lead SOT-23; 8-lead MSOP; and 820 μm × 2255 μm die

4. Rail-to-rail input signal range

Summary of content (12 pages)

PAGE 1
2 Ω, CMOS, ±5 V/+5 V SPST Switches ADG601/ADG602 FUNCTIONAL BLOCK DIAGRAMS Low on resistance, 2.5 Ω maximum <0.65 Ω on-resistance flatness Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V supplies Rail-to-rail input signal range Tiny, 6-lead SOT-23; 8-lead MSOP; and 820 μm × 2255 μm die Low power consumption TTL-/CMOS-compatible inputs S D S D IN ADG601 IN ADG602 NOTES 1. SWITCHES SHOWN FOR A LOGIC 0 INPUT. 02619-001 FEATURES Figure 1.
PAGE 2
ADG601/ADG602 TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ............................................................5 Applications....................................................................................... 1 ESD Caution...................................................................................5 Functional Block Diagrams............................................................
PAGE 3
ADG601/ADG602 SPECIFICATIONS DUAL SUPPLY VDD = 5 V ± 10%, VSS = –5 V ± 10%, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On-Resistance Flatness (RFLAT (ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH +25°C B Version 1 −40°C to +85°C VSS to VDD 2 2.5 0.35 0.6 ±0.01 ±0.25 ±0.01 ±0.25 ±0.
PAGE 4
ADG601/ADG602 SINGLE SUPPLY VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 3. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On-Resistance Flatness (RFLAT (ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH +25°C B Version 1 −40°C to +85°C 0 V to VDD 3.5 5 0.2 ±0.01 ±0.25 ±0.01 ±0.25 ±0.01 ±0.25 8 0.2 0.
PAGE 5
ADG601/ADG602 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 4. Parameter VDD to VSS VDD to GND VSS to GND Analog Inputs 1 Digital Inputs1 Continuous Current, S or D Peak Current, S or D (Pulsed at 1 ms, 10% Duty Cycle Max) Operating Temperature Range Industrial (B Version) Storage Temperature Range Junction Temperature Thermal Resistance MSOP θJA θJC SOT-23 θJA θJC Lead Temperature, Soldering (10 sec) IR Reflow, Peak Temperature 1 Rating 13 V −0.3 V to +6.5 V +0.3 V to –6.5 V VSS − 0.
PAGE 6
ADG601/ADG602 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 3 4 12 S 2 ADG601/ ADG602 5 D 4 GND D 1 PIN 1 INDICATOR 8 S NC 2 ADG601/ ADG602 7 GND 6 IN 5 VSS NC 3 VDD 4 TOP VIEW (Not to Scale) NC = NO CONNECT Figure 2. 6-Lead SOT-23 (RJ-6) 11 10 6 7 9 8 Figure 3. 8-Lead MSOP (RM-8) TOP VIEW (Not to Scale) 02619-021 IN 02619-003 6 02619-002 PIN 1 INDICATOR VSS 3 14 13 5 VDD 1 TOP VIEW (Not to Scale) 1 2 Figure 4. Die (820 μm × 2255 μm) Table 5.
PAGE 7
ADG601/ADG602 TYPICAL PERFORMANCE CHARACTERISTICS 5 5 TA = 25°C +85°C 4 4 ON RESISTANCE (Ω) ON RESISTANCE (Ω) ±2.5V ±3V 3 ±3.3V ±4.5V 2 1 3 +25°C 2 –40°C 1 ±5V –3 –2 –1 0 1 VD, VS (V) 2 3 4 5 0 10 VDD = 2.7V 1.5 2.0 2.5 3.0 VD, VS (V) 3.5 4.0 0.3 LEAKAGE CURRENT (nA) VDD = 3.0V 7 6 5 VDD = 4.5V VDD = 3.3V 4 3 2 1 0 0.5 5.0 0.2 ID, IS (ON) 0.1 0 –0.1 ID (OFF) IS (OFF) –0.2 –0.3 VDD = 5.0V TA = 25°C VSS = 0V 4.5 VDD = +5V VSS = –5V VD = ±4.5V VS = 4.5V 0.4 –0.
PAGE 8
ADG601/ADG602 500 0 TA = 25°C 450 –10 –20 350 OFF ISOLATION (dB) VDD = +5V VSS = –5V 300 250 200 VDD = +5V VSS = 0V 150 –40 –50 –60 100 VDD = +5V VSS = –5V TA = 25°C –70 50 –5 –4 –3 –2 –1 0 VS (V) 1 2 3 4 5 –80 0.2 02619-010 0 –30 Figure 11. Charge Injection vs. Source Voltage 1 10 FREQUENCY (MHz) 100 02619-012 CHARGE INJECTION (pC) 400 Figure 13. Off Isolation vs.
PAGE 9
ADG601/ADG602 TERMINOLOGY VDD Most positive power supply potential. VINL Maximum input voltage for Logic 0. VSS Most negative power supply potential. VINH Minimum input voltage for Logic 1. IDD Positive supply current. IINL (IINH) Input current of the digital input. ISS Negative supply current. CS (Off) Off switch source capacitance. Measured with reference to ground. GND Ground (0 V) reference. CD (Off) Off switch drain capacitance. Measured with reference to ground. S Source terminal.
PAGE 10
ADG601/ADG602 TEST CIRCUITS IDS V1 A D ID (OFF) VD Figure 15. On Resistance S NC A VS 02619-014 VDD VSS VDD VSS NC = NO CONNECT Figure 17. On Leakage 0.1µF ADG601 50% 50% 50% 50% VIN S VS A VD Figure 16. Off Leakage 0.1µF ID (ON) D VOUT D RL 300Ω IN VIN ADG602 CL 35pF 90% VOUT 90% GND tON tOFF 02619-017 RON = V1/IDS VS S 02619-016 IS (OFF) D 02619-015 S Figure 18.
PAGE 11
ADG601/ADG602 OUTLINE DIMENSIONS 3.20 3.00 2.80 2.90 BSC 8 3.20 3.00 2.80 5 1 5.15 4.90 4.65 5 4 1 2 3 2.80 BSC 1.60 BSC PIN 1 INDICATOR 4 0.95 BSC PIN 1 0.65 BSC 0.95 0.85 0.75 1.30 1.15 0.90 1.10 MAX 0.15 0.00 6 0.38 0.22 0.23 0.08 8° 0° SEATING PLANE COPLANARITY 0.10 0.80 0.60 0.40 1.90 BSC 1.45 MAX 0.15 MAX 0.50 0.30 0.22 0.08 SEATING PLANE 10° 4° 0° 0.60 0.45 0.30 COMPLIANT TO JEDEC STANDARDS MO-187-AA COMPLIANT TO JEDEC STANDARDS MO-178-AB Figure 22.