Datasheet

ADG5412/ADG5413
Rev. A | Page 9 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
IN1
1
D1 2
S1 3
V
SS
4
IN2
16
D215
S214
V
DD
13
GND
5
NC
12
S4 6 S311
D4 7 D310
IN4
8
IN3
9
NC = NO CONNECT
ADG5412/
ADG5413
TOP VIEW
(Not to Scale)
09202-002
Figure 2. TSSOP Pin Configuration
NOTES
1. EXPOSED PAD TIED TO SUBSTRATE, V
SS
.
2. NC = NO CONNECT.
PIN 1
INDICATOR
1S1
2V
SS
3GND
4S4
11 V
DD
12 S2
10 NC
9S3
5
D4
6
IN4
7
IN3
8
D3
15
IN1
16
D
1
14
IN2
13
D2
ADG5412/
ADG5413
TOP VIEW
(Not to Scale)
09202-003
Figure 3. LFCSP Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
TSSOP LFCSP Mnemonic Description
1 15 IN1 Logic Control Input 1.
2 16 D1 Drain Terminal 1. This pin can be an input or output.
3 1 S1 Source Terminal 1. This pin can be an input or output.
4 2 V
SS
Most Negative Power Supply Potential.
5 3 GND Ground (0 V) Reference.
6 4 S4 Source Terminal 4. This pin can be an input or output.
7 5 D4 Drain Terminal 4. This pin can be an input or output.
8 6 IN4 Logic Control Input 4.
9 7 IN3 Logic Control Input 3.
10 8 D3 Drain Terminal 3. This pin can be an input or output.
11 9 S3 Source Terminal 3. This pin can be an input or output.
12 10 NC No Connection.
13 11 V
DD
Most Positive Power Supply Potential.
14 12 S2 Source Terminal 2. This pin can be an input or output.
15 13 D2 Drain Terminal 2. This pin can be an input or output.
16 14 IN2 Logic Control Input 2.
EP Exposed Pad
The exposed pad is connected internally. For increased reliability of the solder joints
and maximum thermal capability, it is recommended that the pad be soldered to the
substrate, V
SS
.
Table 8. ADG5412 Truth Table
INx Switch Condition
1 On
0 Off
Table 9. ADG5413 Truth Table
INx S1, S4 S2, S3
0 Off On
1 On Off