Datasheet

Data Sheet ADG5408/ADG5409
Rev. C | Page 17 of 24
3V
0V
OUTPUT
t
r
< 20ns
t
f
< 20ns
A
DDRESS
DRIVE (V
IN
)
t
TRANSITION
t
TRANSITION
50% 50%
90%
90%
OUTPUT
ADG5408*
A0
A1
A2
50Ω
300Ω
GND
S1
S2 TO S7
S8
D
35pF
V
IN
2.4V EN
V
DD
V
SS
V
DD
V
SS
V
S1
V
S8
* SIMILAR CONNECTION FOR ADG5409.
09206-009
Figure 32. Address to Output Switching Times, t
TRANSITION
OUTPUT
ADG5408*
A0
A1
A2
50Ω
300Ω
GND
S1
S2 TO S7
S8
D
35pF
V
IN
2.4V
EN
V
DD
V
SS
V
DD
V
SS
V
S
* SIMILAR CONNECTION FOR ADG5409.
3V
0V
OUTPUT
80% 80%
A
DDRESS
DRIVE (V
IN
)
t
D
09206-010
Figure 33. Break-Before-Make Delay, t
D
OUTPUT
ADG5408*
A0
A1
A2
50Ω
300Ω
GND
S1
S2 TO S8
D
35pF
V
IN
EN
V
DD
V
SS
V
DD
V
SS
V
S
*SIMILAR CONNECTION FOR ADG5409.
3V
0V
OUTPUT
50% 50%
t
OFF
(EN) t
ON
(EN)
0.9V
O
0.9V
O
ENABLE
DRIVE (V
IN
)
09206-011
Figure 34. Enable Delay, t
ON
(EN), t
OFF
(EN)
3V
V
IN
V
OUT
Q
INJ
= C
L
× ∆V
OUT
∆V
OUT
DSx
EN
GND
C
L
1nF
V
OUT
V
IN
R
S
V
S
V
DD
V
SS
V
DD
V
SS
A0
A1
A2
ADG5408*
*SIMILAR CONNECTION FOR ADG5409.
09206-012
Figure 35. Charge Injection