Datasheet
ADG5404
Rev. A | Page 9 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
ADG5404
NC = NO CONNECT
1
2
3
4
5
6
7
EN
V
SS
S1
NC
D
S2
A0
14
13
12
11
10
9
8
GND
V
DD
S3
NC
NC
S4
A1
TOP VIEW
(Not to Scale)
09203-002
Figure 2. TSSOP Pin Configuration
PIN 1
INDICATOR
NOTES
1. NC = NO CONNECT.
2
. EXPOSED PAD TIED TO SUBSTRATE, V
SS
.
1V
SS
2NC
3S1
4S2
11 V
DD
12 GND
10 S3
9S4
5
NC
6
D
7
NC
8
NC
15
A0
16
EN
14
A1
13
NC
TOP VIEW
(Not to Scale)
ADG5404
09203-003
Figure 3. LFCSP Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
TSSOP LFCSP Mnemonic Description
1 15 A0 Logic Control Input.
2 16 EN
Active High Digital Input. When this pin is low, the device is disabled and all switches are off.
When this pin is high, the Ax logic inputs determine the on switches.
3 1 V
SS
Most Negative Power Supply Potential.
4 3 S1 Source Terminal. Can be an input or an output.
5 4 S2 Source Terminal. Can be an input or an output.
6 6 D Drain Terminal. Can be an input or an output.
7 to 9 2, 5, 7, 8, 13 NC No Connection.
10 9 S4 Source Terminal. Can be an input or an output.
11 10 S3 Source Terminal. Can be an input or an output.
12 11 V
DD
Most Positive Power Supply Potential.
13 12 GND Ground (0 V) Reference.
14 14 A1 Logic Control Input.
EP Exposed Pad
The exposed pad is connected internally. For increased reliability of the solder joints and
maximum thermal capability, it is recommended that the pad be soldered to the substrate, V
SS
.
TRUTH TABLE
Table 8.
EN A1 A0 S1 S2 S3 S4
0 X
1
X
1
Off Off Off Off
1 0 0 On Off Off Off
1 0 1 Off On Off Off
1 1 0 Off Off On Off
1 1 1 Off Off Off On
1
X = don’t care.