Datasheet

ADG436
Rev. B | Page 10 of 12
TEST CIRCUITS
SD
V
D
R
ON
= V
1
/I
DS
I
DS
V
1
00030-012
SD
00030-013
V
D
V
S
I
S
(OFF)
A
SD
00030-014
V
D
NC
NC = NO CONNECT
I
D
(ON)
A
Figure 12. On Resistance Figure 13. Off Leakage Figure 14. On Leakage
D
GND
IN
SA
SB
–10V
+10V
V
DD
V
DD
V
SS
V
SS
V
S
V
OUT
R
L
300Ω
C
L
35pF
0.1µF
0.1µF
50% 50%
50% 50%
t
ON
t
OFF
V
IN
V
S
+3V
0V
+10V
0V
–10V
00030-015
Figure 15. Switching Times
D
GND
IN
SA
SB
V
DD
V
DD
V
SS
V
SS
V
S
V
OUT
R
L
300Ω
C
L
35pF
0.1µF
0.1µF
00030-016
3V
0V
V
IN
V
OUT
V
S
50% 50%
t
OPEN
Figure 16. Break-Before-Make Delay, t
open
V
DD
V
DD
V
SS
V
SS
V
OUT
IN
C
L
10nF
GND
V
IN
V
OUT
Q
INJ
= C
L
× ∆V
OUT
∆V
OUT
3V
0V
0V
DSA
V
D
R
D
00030-017
Figure 17. Charge Injection
00030-018
V
SS
V
OUT
GND
SD
V
IN
V
S
V
DD
V
DD
V
SS
0.1µF
0.1µF
R
L
75Ω
00030-019
V
SS
GND
SD
V
IN1
V
S
V
DD
V
DD
V
SS
0.1µF
0.1µF
NC
V
OUT
CHANNEL-TO-CHANNEL
CROSSTALK
20 × LOG |V
S
/V
OUT
|
V
IN2
75Ω
R
L
75Ω
SD
Figure 18. Off Isolation Figure 19. Channel-to Channel Crosstalk