Datasheet

ADG2188
Rev. 0 | Page 15 of 28
TEST CIRCUITS
The test circuits show measurements on one channel for clarity, but the circuit applies to any of the switches in the matrix.
XY
V
S
R
ON
= V1/I
DS
I
DS
V1
05897-031
Figure 25. On Resistance
XY
V
X
V
Y
I
OFF
A A
I
OFF
05897-032
Figure 26. Off Leakage
XY
V
Y
NC
I
ON
A
05897-033
Figure 27. On Leakage
V
X
XY
V
OUT
50%
90%
9TH DATA BIT
GND
0.1µF
0.1µF
V
SS
V
OUT
V
DD
V
SS
V
DD
C
L
35pF
R
L
300
t
OFF
AND
t
ON
05897-034
Figure 28. Switching Times, t
ON
, t
OFF
XY
V
X
C
L
1nF
R
X
Q
INJ
=C
L
× ΔV
OUT
ΔV
OUT
GND
0.1
µ
F0.1
µ
F
V
SS
V
SS
V
DD
V
DD
V
OUT
SW ON
DATA BIT
V
OUT
SW OFF
05897-035
Figure 29. Charge Injection
V
X
50
R
L
50
V
X
Y
0.1µF
V
S
V
OUT
OFF ISOLATION = 20 log
NETWORK
ANALYZER
0.1µF
V
SS
V
SS
50
V
DD
V
DD
V
OUT
GND
05897-036
Figure 30. Off Isolation
V
X
50
R
L
50
V
X
Y
0.1µF
V
OUT
WITHOUT SWITCH
V
OUT
WITH SWITCH
INSERTION LOSS = 20 log
NETWORK
ANALYZER
0.1µF
V
SS
V
SS
V
DD
V
DD
V
OUT
GND
05897-037
Figure 31. Bandwidth