Datasheet
ADG2188
Rev. 0 | Page 10 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC = NO CONNECT
Y
2
Y
4
Y
3
Y
6
Y
7
Y
1
Y
0
Y
5
NC
V
DD
NC
NC
NC
NC
X7
X6
X3
X1
X0
NC
X5
X4
X2
V
SS
R
E
S
E
T
A
1
S
C
L
A
2
A
0
S
D
A
G
N
D
V
L
1
2
3
4
5
6
7
8
32 31 30 29 28 27 26 25
24
23
22
21
20
19
18
17
9 1011 1314151612
PIN 1
INDICATOR
ADG2188
8 × 8
TOP VIEW
(Not to Scale)
05897-003
Exposed Paddle Soldered to V
SS
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
1
Pin No. Mnemonic Description
1 V
SS
Negative Power Supply in a Dual-Supply Application. For single-supply applications, this pin should be tied to GND.
2, 19 to 23 NC No Connect.
3 to 8,
17, 18
X0 to X7 Can be inputs or outputs.
9 to 16 Y0 to Y7 Can be inputs or outputs.
24 V
DD
Positive Power Supply Input.
25 V
L
Logic Power Supply Input.
26 SDA Digital I/O. Bidirectional open drain data line. External pull-up resistor required.
27 SCL
Digital Input, Serial Clock Line. Open drain input that is used in conjunction with SDA to clock data into the
device. External pull-up resistor required.
28 A0 Logic Input. Address pin that sets the least significant bit of the 7-bit slave address.
29 A1 Logic Input. Address pin that sets the second least significant bit of the 7-bit slave address.
30 A2 Logic Input. Address pin that sets the third least significant bit of the 7-bit slave address.
31
RESET
Active Low Logic Input. When this pin is low, all switches are open, and appropriate registers are cleared to 0.
32 GND Ground. Reference point for all circuitry on the ADG2188.
1
It is recommended that the exposed paddle be soldered to V
SS
to improve heat dissipation and crosstalk.