Datasheet

ADG1636
Rev. A | Page 9 of 16
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NC = NO CONNECT
1
2
3
4
5
6
7
8
S1A
D1
S1B
NC
GND
V
SS
IN1
NC
16
15
14
13
12
11
10
9
NC
EN
V
DD
S2A
IN2
D2
S2B
NC
ADG1636
TOP VIEW
(Not to Scale)
0
7983-003
Figure 3. 16-Lead TSSOP Pin Configuration
07983-004
PIN 1
INDICATOR
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD TIED TO SUBSTRATE, V
SS
.
1D1
2S1B
3V
SS
4GND
11 V
DD
12 EN
10 S2B
9D2
5
NC
6
IN
2
7
NC
8
S2A
15
IN1
16
S1
A
14
NC
13
NC
TOP VIEW
(Not to Scale)
ADG1636
Figure 4. 16-Lead LFCSP Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
Mnemonic Description
TSSOP LFCSP
1 15 IN1 Logic Control Input.
2 16 S1A Source Terminal. This pin can be an input or output.
3 1 D1 Drain Terminal. This pin can be an input or output.
4 2 S1B Source Terminal. This pin can be an input or output.
5 3 V
SS
Most Negative Power Supply Potential.
6 4 GND Ground (0 V) Reference.
7, 8, 15, 16 5, 7, 13, 14 NC No Connection.
9 6 IN2 Logic Control Input.
10 8 S2A Source Terminal. This pin can be an input or output.
11 9 D2 Drain Terminal. This pin can be an input or output.
12 10 S2B Source Terminal. This pin can be an input or output.
13 11 V
DD
Most Positive Power Supply Potential.
14 12 EN
Active High Digital Input. When this pin is low, the device is disabled and all switches are
off. When this pin is high, the Ax logic inputs determine the on switches.
N/A 17 (EPAD) EP (EPAD) Exposed Pad. Tied to substrate, V
SS
.
Table 8. ADG1636 TSSOP Truth Table
EN INx SxA SxB
0 X Off Off
1 0 Off On
1 1 On Off
Table 9. ADG1636 LFCSP Truth Table
EN INx SxA SxB
0 X Off Off
1 0 Off On
1 1 On Off