Datasheet

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1 Ω Typical On Resistance, ±5 V, +12 V,

+5 V, and +3.3 V Dual SPDT Switches

Data Sheet

ADG1636

Rev. B Document Feedback

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FEATURES

1 Ω typical on resistance

0.2 Ω on resistance flatness

±3.3 V to ±8 V dual supply operation

3.3 V to 16 V single supply operation

No V

supply required

3 V logic-compatible inputs

Rail-to-rail operation

Continuous current per channel

LFCSP: 385 mA

TSSOP: 238 mA

16-lead TSSOP and 16-lead, 4 mm × 4 mm LFCSP

APPLICATIONS

Communication systems

Medical systems

Audio signal routing

Video signal routing

Automatic test equipment

Data acquisition systems

Battery-powered systems

Sample-and-hold systems

Relay replacements

FUNCTIONAL BLOCK DIAGRAMS

07983-001

ADG1636

S2B

S2A

IN2

IN1

S1B

S1A

NOTES

1. SWITCHES SHOWN FOR A LOGIC 1 INPUT.

Figure 1. 16-Lead TSSOP

07983-002

ADG1636

IN1 IN2

S1B

S1A

S2B

LOGIC

S2A

NOTES

1. SWITCHES SHOWN FOR A 1 INPUT LOGIC.

Figure 2. 16-Lead LFCSP

GENERAL DESCRIPTION

The ADG1636 is a monolithic CMOS device containing two

independently selectable single-pole/double-throw (SPDT)

switches. An EN input is used to enable or disable the device.

When disabled, all channels are switched off. Each switch conducts

equally well in both directions when on and has an input signal

range that extends to the supplies. In the off condition, signal

levels up to the supplies are blocked. Both switches exhibit

break-before-make switching action for use in multiplexer

applications.

The ultralow on resistance of these switches make them ideal

solutions for data acquisition and gain switching applications where

low on resistance and distortion is critical. The on resistance profile

is very flat over the full analog input range, ensuring excellent

linearity and low distortion when switching audio signals.

The CMOS construction ensures ultralow power dissipation,

making the devices ideally suited for portable and battery-

powered instruments.

PRODUCT HIGHLIGHTS

1. 1.6 Ω maximum on resistance over temperature.

2. Minimum distortion: THD + N = 0.007%.

3. 3 V logic-compatible digital inputs: V

INH

= 2.0 V, V

INL

= 0.8 V.

4. No V

logic power supply required.

5. Ultralow power dissipation: <16 nW.

6. 16-lead TSSOP and 16-lead 4 mm × 4 mm LFCSP.

Summary of content (16 pages)

PAGE 1
Ω Typical On Resistance, ±5 V, +12 V, +5 V, and +3.3 V Dual SPDT Switches ADG1636 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAMS 1 Ω typical on resistance 0.2 Ω on resistance flatness ±3.3 V to ±8 V dual supply operation 3.3 V to 16 V single supply operation No VL supply required 3 V logic-compatible inputs Rail-to-rail operation Continuous current per channel LFCSP: 385 mA TSSOP: 238 mA 16-lead TSSOP and 16-lead, 4 mm × 4 mm LFCSP ADG1636 S1A D1 S1B IN1 IN2 S2A D2 NOTES 1.
PAGE 2
ADG1636 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 3.3 V Single Supply........................................................................6 Applications ....................................................................................... 1 Continuous Current per Channel, S or D ..................................7 General Description ........................................................................
PAGE 3
Data Sheet ADG1636 SPECIFICATIONS ±5 V DUAL SUPPLY VDD = +5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted. Table 1.
PAGE 4
ADG1636 Data Sheet 12 V SINGLE SUPPLY VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (∆RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 25°C −40°C to +85°C −40°C to +125°C 0 V to VDD 0.
PAGE 5
Data Sheet ADG1636 5 V SINGLE SUPPLY VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 3. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (∆RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 25°C −40°C to +85°C −40°C to 125°C 0 V to VDD 1.7 2.
PAGE 6
ADG1636 Data Sheet 3.3 V SINGLE SUPPLY VDD = 3.3 V, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 4. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (∆RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 25°C −40°C to +85°C −40°C to +125°C Unit 3.2 3.
PAGE 7
Data Sheet ADG1636 CONTINUOUS CURRENT PER CHANNEL, S OR D Table 5. Parameter CONTINUOUS CURRENT, S OR D VDD = +5 V, VSS = −5 V TSSOP (θJA = 150.4°C/W) LFCSP (θJA = 48.7°C/W) VDD = 12 V, VSS = 0 V TSSOP (θJA = 150.4°C/W) LFCSP (θJA = 48.7°C/W) VDD = 5 V, VSS = 0 V TSSOP (θJA = 150.4°C/W) LFCSP (θJA = 48.7°C/W) VDD = 3.3 V, VSS = 0 V TSSOP (θJA = 150.4°C/W) LFCSP (θJA = 48.
PAGE 8
ADG1636 Data Sheet ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 6. Parameter VDD to VSS VDD to GND VSS to GND Analog Inputs 1 Digital Inputs1 Peak Current, S or D Continuous Current, S or D 2 Operating Temperature Range Industrial (Y Version) Storage Temperature Range Junction Temperature θJA Thermal Impedance 16-Lead TSSOP (2-Layer Board) 16-Lead LFCSP (4-Layer Board) Reflow Soldering Peak Temperature, Pb free Rating 18 V −0.3 V to +18 V +0.3 V to −18 V VSS − 0.3 V to VDD + 0.
PAGE 9
Data Sheet ADG1636 13 NIC D1 1 13 VDD 12 S2B 9 IN2 10 S2B NOTES 1. NIC = NO INTERNAL CONNECTION. 2. TIE THE EXPOSED PAD TO THE SUBSTRATE, VSS. 07983-003 NOTES 1. NIC = NO INTERNAL CONNECTION.
PAGE 10
ADG1636 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 1.4 TA = 25°C 1.2 ON RESISTANCE (Ω) 1.2 1.0 VDD = +5V VSS = –5V 0.8 VDD = +8V VSS = –8V 0.6 0.4 –8 –6 –4 –2 0 TA = +125°C TA = +85°C TA = +25°C TA = –40°C 1.0 0.8 0.6 2 4 6 8 VS OR VD VOLTAGE (V) 0.4 07983-014 0 2 12 2.5 3.5 TA = 25°C ON RESISTANCE (Ω) VDD = 3.3V VSS = 0V 2.5 2.0 VDD = 5V VSS = 0V 1.5 VDD = 12V VSS = 0V 4 6 8 12 10 1.5 14 16 VS OR VD VOLTAGE (V) 1.0 Figure 6.
PAGE 11
Data Sheet ADG1636 18 15 16 ID (OFF) –, + 14 LEAKAGE CURRENT (nA) 5 IS (OFF) +, – 0 IS (OFF) –, + ID, IS (ON) –, – ID (OFF) +, – 10 8 ID, IS (OFF) –, – 6 ID (OFF) –, + 4 IS (OFF) +, – 2 0 –10 IS (OFF) –, + –2 0 20 40 60 100 80 120 TEMPERATURE (°C) 0 20 60 40 100 80 120 TEMPERATURE (°C) Figure 11. Leakage Currents as a Function of Temperature, ±5 V Dual Supply Figure 14. Leakage Currents as a Function of Temperature, 3.
PAGE 12
ADG1636 Data Sheet 450 TA = 25°C VDD = +5V VSS = –5V –1 400 VDD = +3.3V, VSS = 0V –3 INSERTION LOSS (dB) 350 TIME (ns) 300 VDD = +5V, VSS = 0V 250 200 150 VDD = +5V, VSS = –5V 100 –5 –7 –9 –11 –13 20 60 40 80 100 120 TEMPERATURE (°C) –15 1k 0 10M 100M 1G TA = 25°C VDD = +5V VSS = –5V –20 NO DECOUPLING CAPACITORS ACPSRR (dB) –40 –60 DECOUPLING CAPACITORS –80 –100 100k 1M 10M 100M 1G –120 1k 07983-008 OFF ISOLATION (dB) 1M Figure 20. On Response vs.
PAGE 13
Data Sheet ADG1636 TEST CIRCUITS VDD VSS 0.1µF 0.1µF VDD SxA INx NETWORK ANALYZER VSS NIC SxB 50Ω 50Ω VS V Dx VIN SxA/SxB Dx RL 50Ω GND VOUT 07983-020 OFF ISOLATION = 20 log Figure 23. On Resistance 07983-027 IDS VS VOUT VS Figure 26. Off Isolation VDD VSS 0.1µF 0.1µF VDD SxA INx NETWORK ANALYZER VSS NIC SxB 50Ω 50Ω VS Dx Dx GND A VS RL 50Ω VD INSERTION LOSS = 20 log VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 27. Bandwidth Figure 24. Off Leakage VDD VSS 0.
PAGE 14
ADG1636 Data Sheet VDD VSS 0.1µF 0.1µF AUDIO PRECISION VDD VSS RS SxA/SxB INx VS V p-p Dx VIN VOUT RL 110Ω 07983-034 GND Figure 29. THD + Noise VDD VSS VDD VIN 50% 50% VIN 50% 50% VSS SxB VS 0.1µF Dx SxA VOUT RL 300Ω INx CL 35pF 90% VOUT 90% GND VIN tON tOFF 07983-023 0.1µF Figure 30. Switching Times 0.1µF VDD VSS VDD VSS SxB VS 0.1µF VIN Dx VOUT SxA RL 300Ω INx VOUT CL 35pF 80% tBBM GND tBBM 07983-024 VIN Figure 31.
PAGE 15
Data Sheet ADG1636 TERMINOLOGY tTRANSITION The delay time between the 50% and 90% points of the digital input and switch on condition when switching from one address state to another. IDD The positive supply current. ISS The negative supply current. tON (EN) The delay between applying the digital control input and the output switching on. See Figure 30. VD (VS) The analog voltage on Terminal D and Terminal S. RON The ohmic resistance between Terminal D and Terminal S.
PAGE 16
ADG1636 Data Sheet OUTLINE DIMENSIONS 5.10 5.00 4.90 16 9 4.50 4.40 4.30 6.40 BSC 1 8 PIN 1 1.20 MAX 0.15 0.05 0.20 0.09 0.30 0.19 0.65 BSC COPLANARITY 0.10 0.75 0.60 0.45 8° 0° SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 33. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters 0.35 0.30 0.25 0.65 BSC PIN 1 INDICATOR 16 13 1 12 EXPOSED PAD 2.60 2.50 SQ 2.40 9 TOP VIEW 0.80 0.75 0.70 0.50 0.40 0.30 4 8 BOTTOM VIEW 0.05 MAX 0.