Datasheet

ADG1633/ADG1634
Rev. 0 | Page 9 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
S1A
D1
S1B
S2A
D2
S2B
V
DD
IN1
EN
V
SS
S3A
IN2 IN3
D3
S3B
GND
ADG1633
TOP VIEW
(Not to Scale)
08319-004
Figure 4. ADG1633 TSSOP Pin Configuration
PIN 1
INDICATOR
1D1
2S1B
3S2B
4D2
11 V
SS
12 EN
10 S3B
9D3
5
S2A
6
IN2
7
IN3
8
S3A
15 V
DD
16 S1A
14 GND
13
IN
1
TOP VIEW
(Not to Scale)
ADG1633
NOTES
1. EXPOSED PAD IS TIED TO THE SUBSTRATE, V
SS
.
0
8319-005
Figure 5. ADG1633 LFCSP_VQ Pin Configuration
Table 8. ADG1633 Pin Function Descriptions
Pin No.
Mnemonic Description TSSOP LFCSP_VQ
1 15 V
DD
Most Positive Power Supply Potential.
2 16 S1A Source Terminal 1A. Can be an input or an output.
3 1 D1
Drain Terminal 1. Can be an input or an output.
4 2 S1B
Source Terminal 1B. Can be an input or an output.
5 3 S2B
Source Terminal 2B. Can be an input or an output.
6 4 D2
Drain Terminal 2. Can be an input or an output.
7 5 S2A
Source Terminal 2A. Can be an input or an output.
8 6 IN2
Logic Control Input 2.
9 7 IN3
Logic Control Input 3.
10 8 S3A
Source Terminal 3A. Can be an input or an output.
11 9 D3
Drain Terminal 3. Can be an input or an output.
12 10 S3B
Source Terminal 3B. Can be an input or an output.
13 11 V
SS
Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to ground.
14 12
EN Active Low Digital Input. When this pin is high, the device is disabled and all switches are off. When
this pin is low, INx logic inputs determine the on switches.
15 13 IN1
Logic Control Input 1.
16 14 GND
Ground (0 V) Reference.
N/A 17 EP Exposed Pad. The exposed pad is tied to the substrate, V
SS
.
Table 9. ADG1633 Truth Table
EN
INx SxA SxB
1 X
1
Off Off
0 0 Off On
0 1 On Off
1
X = don’t care.