Datasheet

ADG1633/ADG1634
Rev. 0 | Page 14 of 20
TEST CIRCUITS
I
DS
SD
V
S
V
08319-008
Figure 26. On Resistance
SD
V
S
A A
V
D
I
S
(OFF) I
D
(OFF)
08319-009
Figure 27. Off Leakage
SD
A
V
D
I
D
(ON)
NC
NC = NO CONNECT
08319-010
Figure 28. On Leakage
IN
V
OUT
D
SA
V
DD
V
SS
V
DD
V
SS
GND
C
L
35pF
SB
V
IN
V
S
0.1µF0.1µF
R
L
100
50%
50%
90%
50%
50%
90%
t
ON
t
OFF
V
IN
V
OUT
V
IN
08319-011
Figure 29. Switching Timing
IN
V
OUT
D
SA
V
DD
V
SS
V
DD
V
SS
GND
C
L
35pF
SB
V
IN
V
S
0.1µF0.1µF
R
L
100
80%
t
BBM
t
BBM
V
OUT
V
IN
08319-012
Figure 30. Break-Before-Make Delay, t
D
EN
INx
V
DD
V
SS
V
DD
V
SS
GND
ADG1633
INx
S1B
S1A
V
IN
0.1µF0.1µF
INx
V
S
V
OUT D1
C
L
35pF
50%
0.9V
OUT
0.9V
OUT
t
ON
(EN)
50%
V
OUT
0V
0V
ENABLE
DRIVE (V
IN
)
OUTPUT
3V
t
OFF
(EN)
R
L
100
50
08319-013
Figure 31. Enable Delay, t
ON
(
EN
), t
OFF
(
EN
)